[PATCH] D57059: [SLP] Initial support for the vectorization of the non-power-of-2 vectors.

Alexey Bataev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 24 07:19:39 PDT 2020


ABataev added inline comments.


================
Comment at: llvm/test/Transforms/SLPVectorizer/AArch64/PR38339.ll:16
+; CHECK-NEXT:    store i16 [[T3]], i16* [[PTR2]]
+; CHECK-NEXT:    store i16 [[T2]], i16* [[PTR3]]
 ; CHECK-NEXT:    ret void
----------------
ABataev wrote:
> RKSimon wrote:
> > ABataev wrote:
> > > RKSimon wrote:
> > > > These "feel" like regressions to me - any idea whats going on?
> > > The cost model problem, if I recall it correctly. I investigated it before and found out that the cost model for AArch64 is not defined for long vectors in some cases and we fall back to the generic cost model evaluation which is not quite correct in many cases. Need to tweak the cost model for AArch64.
> > Any instruction cost type (extract/shuffle/store?) in particular that needs better costs? It'd be good to at least raise a specific bug report to the aarch64 team
> Do not remember already, need some time to investigate it again. Hope to do it by the end of this week.
> PS. There was a question about this test already. 
Found the reason. It is the cost of shuffle of `TTI::SK_PermuteSingleSrc` kind. Before this patch, the test operated with the vector `<2 x i16>`, which is transformed to `llvm::MVT::v2i32` by type legalization  function and the cost of this shuffle is tweaked to be `1` (see llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp, `AArch64TTIImpl::getShuffleCost`). The cost of this operation is 1, per table.

With this patch, the original vector type is `<4 x i16>` which is transformed to `llvm::MVT::v4i16` and there is no optimized value for `TTI::SK_PermuteSingleSrc` in the table for this type and the function falls back to the pessimistic cost model and returns `18`.

There are several TODOs int the file already about fixing the cost model for different shuffle operations.


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