[PATCH] D87860: [mlir][OpFormatGen] Update "custom" directives for attributes.

[Mike Urbach via Phabricator via llvm-commits]

mikeurbach updated this revision to Diff 293804.
mikeurbach edited the summary of this revision.
mikeurbach added a comment.

Use `arc diff --edit --verbatim` to update summary


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87860/new/

https://reviews.llvm.org/D87860

Files:
  mlir/test/lib/Dialect/Test/TestDialect.cpp
  mlir/test/lib/Dialect/Test/TestOps.td
  mlir/test/mlir-tblgen/op-format.mlir
  mlir/tools/mlir-tblgen/OpFormatGen.cpp


Index: mlir/tools/mlir-tblgen/OpFormatGen.cpp
===================================================================
--- mlir/tools/mlir-tblgen/OpFormatGen.cpp
+++ mlir/tools/mlir-tblgen/OpFormatGen.cpp
@@ -898,8 +898,8 @@
       if (var->attr.isOptional())
         body << llvm::formatv("    if ({0}Attr)\n  ", var->name);
 
-      body << llvm::formatv(
-          "    result.attributes.addAttribute(\"{0}\", {0}Attr);", var->name);
+      body << llvm::formatv("    result.addAttribute(\"{0}\", {0}Attr);\n",
+                            var->name);
     } else if (auto *operand = dyn_cast<OperandVariable>(&param)) {
       const NamedTypeConstraint *var = operand->getVar();
       if (!var->isOptional())
Index: mlir/test/mlir-tblgen/op-format.mlir
===================================================================
--- mlir/test/mlir-tblgen/op-format.mlir
+++ mlir/test/mlir-tblgen/op-format.mlir
@@ -213,6 +213,12 @@
 // CHECK: test.format_custom_directive_operands_and_types %[[I64]] -> (%[[I64]]) : i64 -> (i64)
 test.format_custom_directive_operands_and_types %i64 -> (%i64) : i64 -> (i64)
 
+// CHECK: test.format_custom_directive_attributes 54 : i64
+test.format_custom_directive_attributes 54 : i64
+
+// CHECK: test.format_custom_directive_attributes 54 : i64, 46 : i64
+test.format_custom_directive_attributes 54 : i64, 46 : i64
+
 // CHECK: test.format_custom_directive_regions {
 // CHECK-NEXT: test.return
 // CHECK-NEXT: }
Index: mlir/test/lib/Dialect/Test/TestOps.td
===================================================================
--- mlir/test/lib/Dialect/Test/TestOps.td
+++ mlir/test/lib/Dialect/Test/TestOps.td
@@ -1530,6 +1530,17 @@
   }];
 }
 
+def FormatCustomDirectiveAttributes
+    : TEST_Op<"format_custom_directive_attributes"> {
+  let arguments = (ins I64Attr:$attr, OptionalAttr<I64Attr>:$optAttr);
+  let assemblyFormat = [{
+    custom<CustomDirectiveAttributes>(
+      $attr, $optAttr
+    )
+    attr-dict
+  }];
+}
+
 //===----------------------------------------------------------------------===//
 // AllTypesMatch type inference
 
Index: mlir/test/lib/Dialect/Test/TestDialect.cpp
===================================================================
--- mlir/test/lib/Dialect/Test/TestDialect.cpp
+++ mlir/test/lib/Dialect/Test/TestDialect.cpp
@@ -345,6 +345,17 @@
   varSuccessors.append(2, varSuccessor);
   return success();
 }
+static ParseResult parseCustomDirectiveAttributes(OpAsmParser &parser,
+                                                  IntegerAttr &attr,
+                                                  IntegerAttr &optAttr) {
+  if (parser.parseAttribute(attr))
+    return failure();
+  if (succeeded(parser.parseOptionalComma())) {
+    if (parser.parseAttribute(optAttr))
+      return failure();
+  }
+  return success();
+}
 
 //===----------------------------------------------------------------------===//
 // Printing
@@ -390,6 +401,13 @@
   if (!varSuccessors.empty())
     printer << ", " << varSuccessors.front();
 }
+static void printCustomDirectiveAttributes(OpAsmPrinter &printer,
+                                           Attribute attribute,
+                                           Attribute optAttribute) {
+  printer << attribute;
+  if (optAttribute)
+    printer << ", " << optAttribute;
+}
 
 //===----------------------------------------------------------------------===//
 // Test IsolatedRegionOp - parse passthrough region arguments.


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