[llvm] b877933 - [UpdateTestChecks] Remove bug-exposing test
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 23 09:32:18 PDT 2020
On Wed, Sep 23, 2020 at 7:28 PM David Greene via llvm-commits
<llvm-commits at lists.llvm.org> wrote:
>
>
> Author: David Greene
> Date: 2020-09-23T11:28:28-05:00
> New Revision: b8779337841bea03bc514d239ce76eceba3f01dd
>
> URL: https://github.com/llvm/llvm-project/commit/b8779337841bea03bc514d239ce76eceba3f01dd
> DIFF: https://github.com/llvm/llvm-project/commit/b8779337841bea03bc514d239ce76eceba3f01dd.diff
>
> LOG: [UpdateTestChecks] Remove bug-exposing test
>
> Remove RISCV codegen tests for --include-generated-funcs because apparently
> MachineOutliner has a bug on that target that is exposed by expensive-checks.
Why not just change the target instead of zeroing-out the test coverage?
> Added:
>
>
> Modified:
>
>
> Removed:
> llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/riscv_generated_funcs.ll
> llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/riscv_generated_funcs.ll.generated.expected
> llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/riscv_generated_funcs.ll.nogenerated.expected
> llvm/test/tools/UpdateTestChecks/update_llc_test_checks/riscv_generated_funcs.test
>
>
> ################################################################################
> diff --git a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/riscv_generated_funcs.ll b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/riscv_generated_funcs.ll
> deleted file mode 100644
> index 33691746124c..000000000000
> --- a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/riscv_generated_funcs.ll
> +++ /dev/null
> @@ -1,63 +0,0 @@
> -; RUN: llc -enable-machine-outliner -mtriple=riscv32-unknown-linux < %s | FileCheck %s
> - at x = global i32 0, align 4
> -
> -define i32 @check_boundaries() #0 {
> - %1 = alloca i32, align 4
> - %2 = alloca i32, align 4
> - %3 = alloca i32, align 4
> - %4 = alloca i32, align 4
> - %5 = alloca i32, align 4
> - store i32 0, i32* %1, align 4
> - store i32 0, i32* %2, align 4
> - %6 = load i32, i32* %2, align 4
> - %7 = icmp ne i32 %6, 0
> - br i1 %7, label %9, label %8
> -
> - store i32 1, i32* %2, align 4
> - store i32 2, i32* %3, align 4
> - store i32 3, i32* %4, align 4
> - store i32 4, i32* %5, align 4
> - br label %10
> -
> - store i32 1, i32* %4, align 4
> - br label %10
> -
> - %11 = load i32, i32* %2, align 4
> - %12 = icmp ne i32 %11, 0
> - br i1 %12, label %14, label %13
> -
> - store i32 1, i32* %2, align 4
> - store i32 2, i32* %3, align 4
> - store i32 3, i32* %4, align 4
> - store i32 4, i32* %5, align 4
> - br label %15
> -
> - store i32 1, i32* %4, align 4
> - br label %15
> -
> - ret i32 0
> -}
> -
> -define i32 @main() #0 {
> - %1 = alloca i32, align 4
> - %2 = alloca i32, align 4
> - %3 = alloca i32, align 4
> - %4 = alloca i32, align 4
> - %5 = alloca i32, align 4
> -
> - store i32 0, i32* %1, align 4
> - store i32 0, i32* @x, align 4
> - store i32 1, i32* %2, align 4
> - store i32 2, i32* %3, align 4
> - store i32 3, i32* %4, align 4
> - store i32 4, i32* %5, align 4
> - store i32 1, i32* @x, align 4
> - call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
> - store i32 1, i32* %2, align 4
> - store i32 2, i32* %3, align 4
> - store i32 3, i32* %4, align 4
> - store i32 4, i32* %5, align 4
> - ret i32 0
> -}
> -
> -attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }
>
> diff --git a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/riscv_generated_funcs.ll.generated.expected b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/riscv_generated_funcs.ll.generated.expected
> deleted file mode 100644
> index fffaba35572d..000000000000
> --- a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/riscv_generated_funcs.ll.generated.expected
> +++ /dev/null
> @@ -1,143 +0,0 @@
> -; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --include-generated-funcs
> -; RUN: llc -enable-machine-outliner -mtriple=riscv32-unknown-linux < %s | FileCheck %s
> - at x = global i32 0, align 4
> -
> -define i32 @check_boundaries() #0 {
> - %1 = alloca i32, align 4
> - %2 = alloca i32, align 4
> - %3 = alloca i32, align 4
> - %4 = alloca i32, align 4
> - %5 = alloca i32, align 4
> - store i32 0, i32* %1, align 4
> - store i32 0, i32* %2, align 4
> - %6 = load i32, i32* %2, align 4
> - %7 = icmp ne i32 %6, 0
> - br i1 %7, label %9, label %8
> -
> - store i32 1, i32* %2, align 4
> - store i32 2, i32* %3, align 4
> - store i32 3, i32* %4, align 4
> - store i32 4, i32* %5, align 4
> - br label %10
> -
> - store i32 1, i32* %4, align 4
> - br label %10
> -
> - %11 = load i32, i32* %2, align 4
> - %12 = icmp ne i32 %11, 0
> - br i1 %12, label %14, label %13
> -
> - store i32 1, i32* %2, align 4
> - store i32 2, i32* %3, align 4
> - store i32 3, i32* %4, align 4
> - store i32 4, i32* %5, align 4
> - br label %15
> -
> - store i32 1, i32* %4, align 4
> - br label %15
> -
> - ret i32 0
> -}
> -
> -define i32 @main() #0 {
> - %1 = alloca i32, align 4
> - %2 = alloca i32, align 4
> - %3 = alloca i32, align 4
> - %4 = alloca i32, align 4
> - %5 = alloca i32, align 4
> -
> - store i32 0, i32* %1, align 4
> - store i32 0, i32* @x, align 4
> - store i32 1, i32* %2, align 4
> - store i32 2, i32* %3, align 4
> - store i32 3, i32* %4, align 4
> - store i32 4, i32* %5, align 4
> - store i32 1, i32* @x, align 4
> - call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
> - store i32 1, i32* %2, align 4
> - store i32 2, i32* %3, align 4
> - store i32 3, i32* %4, align 4
> - store i32 4, i32* %5, align 4
> - ret i32 0
> -}
> -
> -attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }
> -; CHECK-LABEL: check_boundaries:
> -; CHECK: # %bb.0:
> -; CHECK-NEXT: addi sp, sp, -32
> -; CHECK-NEXT: .cfi_def_cfa_offset 32
> -; CHECK-NEXT: sw ra, 28(sp)
> -; CHECK-NEXT: sw s0, 24(sp)
> -; CHECK-NEXT: .cfi_offset ra, -4
> -; CHECK-NEXT: .cfi_offset s0, -8
> -; CHECK-NEXT: addi s0, sp, 32
> -; CHECK-NEXT: .cfi_def_cfa s0, 0
> -; CHECK-NEXT: sw zero, -12(s0)
> -; CHECK-NEXT: sw zero, -16(s0)
> -; CHECK-NEXT: addi a0, zero, 1
> -; CHECK-NEXT: beqz zero, .LBB0_3
> -; CHECK-NEXT: # %bb.1:
> -; CHECK-NEXT: sw a0, -24(s0)
> -; CHECK-NEXT: lw a0, -16(s0)
> -; CHECK-NEXT: beqz a0, .LBB0_4
> -; CHECK-NEXT: .LBB0_2:
> -; CHECK-NEXT: addi a0, zero, 1
> -; CHECK-NEXT: sw a0, -24(s0)
> -; CHECK-NEXT: j .LBB0_5
> -; CHECK-NEXT: .LBB0_3:
> -; CHECK-NEXT: call t0, OUTLINED_FUNCTION_0
> -; CHECK-NEXT: lw a0, -16(s0)
> -; CHECK-NEXT: bnez a0, .LBB0_2
> -; CHECK-NEXT: .LBB0_4:
> -; CHECK-NEXT: addi a0, zero, 1
> -; CHECK-NEXT: call t0, OUTLINED_FUNCTION_0
> -; CHECK-NEXT: .LBB0_5:
> -; CHECK-NEXT: mv a0, zero
> -; CHECK-NEXT: lw s0, 24(sp)
> -; CHECK-NEXT: lw ra, 28(sp)
> -; CHECK-NEXT: addi sp, sp, 32
> -; CHECK-NEXT: ret
> -;
> -; CHECK-LABEL: main:
> -; CHECK: # %bb.0:
> -; CHECK-NEXT: addi sp, sp, -32
> -; CHECK-NEXT: .cfi_def_cfa_offset 32
> -; CHECK-NEXT: sw ra, 28(sp)
> -; CHECK-NEXT: sw s0, 24(sp)
> -; CHECK-NEXT: .cfi_offset ra, -4
> -; CHECK-NEXT: .cfi_offset s0, -8
> -; CHECK-NEXT: addi s0, sp, 32
> -; CHECK-NEXT: .cfi_def_cfa s0, 0
> -; CHECK-NEXT: sw zero, -12(s0)
> -; CHECK-NEXT: lui a0, %hi(x)
> -; CHECK-NEXT: addi a1, zero, 1
> -; CHECK-NEXT: sw a1, -16(s0)
> -; CHECK-NEXT: addi a2, zero, 2
> -; CHECK-NEXT: sw a2, -20(s0)
> -; CHECK-NEXT: addi a3, zero, 3
> -; CHECK-NEXT: sw a3, -24(s0)
> -; CHECK-NEXT: addi a4, zero, 4
> -; CHECK-NEXT: sw a4, -28(s0)
> -; CHECK-NEXT: sw a1, %lo(x)(a0)
> -; CHECK-NEXT: #APP
> -; CHECK-NEXT: #NO_APP
> -; CHECK-NEXT: sw a1, -16(s0)
> -; CHECK-NEXT: sw a2, -20(s0)
> -; CHECK-NEXT: sw a3, -24(s0)
> -; CHECK-NEXT: sw a4, -28(s0)
> -; CHECK-NEXT: mv a0, zero
> -; CHECK-NEXT: lw s0, 24(sp)
> -; CHECK-NEXT: lw ra, 28(sp)
> -; CHECK-NEXT: addi sp, sp, 32
> -; CHECK-NEXT: ret
> -;
> -; CHECK-LABEL: OUTLINED_FUNCTION_0:
> -; CHECK: # %bb.0:
> -; CHECK-NEXT: sw a0, -16(s0)
> -; CHECK-NEXT: addi a0, zero, 2
> -; CHECK-NEXT: sw a0, -20(s0)
> -; CHECK-NEXT: addi a0, zero, 3
> -; CHECK-NEXT: sw a0, -24(s0)
> -; CHECK-NEXT: addi a0, zero, 4
> -; CHECK-NEXT: sw a0, -28(s0)
> -; CHECK-NEXT: jr t0
>
> diff --git a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/riscv_generated_funcs.ll.nogenerated.expected b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/riscv_generated_funcs.ll.nogenerated.expected
> deleted file mode 100644
> index 4293bd3bb876..000000000000
> --- a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/riscv_generated_funcs.ll.nogenerated.expected
> +++ /dev/null
> @@ -1,131 +0,0 @@
> -; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
> -; RUN: llc -enable-machine-outliner -mtriple=riscv32-unknown-linux < %s | FileCheck %s
> - at x = global i32 0, align 4
> -
> -define i32 @check_boundaries() #0 {
> -; CHECK-LABEL: check_boundaries:
> -; CHECK: # %bb.0:
> -; CHECK-NEXT: addi sp, sp, -32
> -; CHECK-NEXT: .cfi_def_cfa_offset 32
> -; CHECK-NEXT: sw ra, 28(sp)
> -; CHECK-NEXT: sw s0, 24(sp)
> -; CHECK-NEXT: .cfi_offset ra, -4
> -; CHECK-NEXT: .cfi_offset s0, -8
> -; CHECK-NEXT: addi s0, sp, 32
> -; CHECK-NEXT: .cfi_def_cfa s0, 0
> -; CHECK-NEXT: sw zero, -12(s0)
> -; CHECK-NEXT: sw zero, -16(s0)
> -; CHECK-NEXT: addi a0, zero, 1
> -; CHECK-NEXT: beqz zero, .LBB0_3
> -; CHECK-NEXT: # %bb.1:
> -; CHECK-NEXT: sw a0, -24(s0)
> -; CHECK-NEXT: lw a0, -16(s0)
> -; CHECK-NEXT: beqz a0, .LBB0_4
> -; CHECK-NEXT: .LBB0_2:
> -; CHECK-NEXT: addi a0, zero, 1
> -; CHECK-NEXT: sw a0, -24(s0)
> -; CHECK-NEXT: j .LBB0_5
> -; CHECK-NEXT: .LBB0_3:
> -; CHECK-NEXT: call t0, OUTLINED_FUNCTION_0
> -; CHECK-NEXT: lw a0, -16(s0)
> -; CHECK-NEXT: bnez a0, .LBB0_2
> -; CHECK-NEXT: .LBB0_4:
> -; CHECK-NEXT: addi a0, zero, 1
> -; CHECK-NEXT: call t0, OUTLINED_FUNCTION_0
> -; CHECK-NEXT: .LBB0_5:
> -; CHECK-NEXT: mv a0, zero
> -; CHECK-NEXT: lw s0, 24(sp)
> -; CHECK-NEXT: lw ra, 28(sp)
> -; CHECK-NEXT: addi sp, sp, 32
> -; CHECK-NEXT: ret
> - %1 = alloca i32, align 4
> - %2 = alloca i32, align 4
> - %3 = alloca i32, align 4
> - %4 = alloca i32, align 4
> - %5 = alloca i32, align 4
> - store i32 0, i32* %1, align 4
> - store i32 0, i32* %2, align 4
> - %6 = load i32, i32* %2, align 4
> - %7 = icmp ne i32 %6, 0
> - br i1 %7, label %9, label %8
> -
> - store i32 1, i32* %2, align 4
> - store i32 2, i32* %3, align 4
> - store i32 3, i32* %4, align 4
> - store i32 4, i32* %5, align 4
> - br label %10
> -
> - store i32 1, i32* %4, align 4
> - br label %10
> -
> - %11 = load i32, i32* %2, align 4
> - %12 = icmp ne i32 %11, 0
> - br i1 %12, label %14, label %13
> -
> - store i32 1, i32* %2, align 4
> - store i32 2, i32* %3, align 4
> - store i32 3, i32* %4, align 4
> - store i32 4, i32* %5, align 4
> - br label %15
> -
> - store i32 1, i32* %4, align 4
> - br label %15
> -
> - ret i32 0
> -}
> -
> -define i32 @main() #0 {
> -; CHECK-LABEL: main:
> -; CHECK: # %bb.0:
> -; CHECK-NEXT: addi sp, sp, -32
> -; CHECK-NEXT: .cfi_def_cfa_offset 32
> -; CHECK-NEXT: sw ra, 28(sp)
> -; CHECK-NEXT: sw s0, 24(sp)
> -; CHECK-NEXT: .cfi_offset ra, -4
> -; CHECK-NEXT: .cfi_offset s0, -8
> -; CHECK-NEXT: addi s0, sp, 32
> -; CHECK-NEXT: .cfi_def_cfa s0, 0
> -; CHECK-NEXT: sw zero, -12(s0)
> -; CHECK-NEXT: lui a0, %hi(x)
> -; CHECK-NEXT: addi a1, zero, 1
> -; CHECK-NEXT: sw a1, -16(s0)
> -; CHECK-NEXT: addi a2, zero, 2
> -; CHECK-NEXT: sw a2, -20(s0)
> -; CHECK-NEXT: addi a3, zero, 3
> -; CHECK-NEXT: sw a3, -24(s0)
> -; CHECK-NEXT: addi a4, zero, 4
> -; CHECK-NEXT: sw a4, -28(s0)
> -; CHECK-NEXT: sw a1, %lo(x)(a0)
> -; CHECK-NEXT: #APP
> -; CHECK-NEXT: #NO_APP
> -; CHECK-NEXT: sw a1, -16(s0)
> -; CHECK-NEXT: sw a2, -20(s0)
> -; CHECK-NEXT: sw a3, -24(s0)
> -; CHECK-NEXT: sw a4, -28(s0)
> -; CHECK-NEXT: mv a0, zero
> -; CHECK-NEXT: lw s0, 24(sp)
> -; CHECK-NEXT: lw ra, 28(sp)
> -; CHECK-NEXT: addi sp, sp, 32
> -; CHECK-NEXT: ret
> - %1 = alloca i32, align 4
> - %2 = alloca i32, align 4
> - %3 = alloca i32, align 4
> - %4 = alloca i32, align 4
> - %5 = alloca i32, align 4
> -
> - store i32 0, i32* %1, align 4
> - store i32 0, i32* @x, align 4
> - store i32 1, i32* %2, align 4
> - store i32 2, i32* %3, align 4
> - store i32 3, i32* %4, align 4
> - store i32 4, i32* %5, align 4
> - store i32 1, i32* @x, align 4
> - call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
> - store i32 1, i32* %2, align 4
> - store i32 2, i32* %3, align 4
> - store i32 3, i32* %4, align 4
> - store i32 4, i32* %5, align 4
> - ret i32 0
> -}
> -
> -attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }
>
> diff --git a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/riscv_generated_funcs.test b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/riscv_generated_funcs.test
> deleted file mode 100644
> index 5275f8900624..000000000000
> --- a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/riscv_generated_funcs.test
> +++ /dev/null
> @@ -1,17 +0,0 @@
> -# REQUIRES: riscv-registered-target
> -
> -## Check that generated functions are included.
> -# RUN: cp -f %S/Inputs/riscv_generated_funcs.ll %t.ll && %update_llc_test_checks --include-generated-funcs %t.ll
> -# RUN:
> diff -u %t.ll %S/Inputs/riscv_generated_funcs.ll.generated.expected
> -
> -## Check that running the script again does not change the result:
> -# RUN: %update_llc_test_checks --include-generated-funcs %t.ll
> -# RUN:
> diff -u %t.ll %S/Inputs/riscv_generated_funcs.ll.generated.expected
> -
> -## Check that generated functions are not included.
> -# RUN: cp -f %S/Inputs/riscv_generated_funcs.ll %t.ll && %update_llc_test_checks %t.ll
> -# RUN:
> diff -u %t.ll %S/Inputs/riscv_generated_funcs.ll.nogenerated.expected
> -
> -## Check that running the script again does not change the result:
> -# RUN: %update_llc_test_checks %t.ll
> -# RUN:
> diff -u %t.ll %S/Inputs/riscv_generated_funcs.ll.nogenerated.expected
>
>
>
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