[PATCH] D88142: fix a mistake in RISCVInstrInfoV.td

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achieveartificialintelligence created this revision.
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comment in the class VALUVVNoVm
// op vd, vs1, vs2
should be
// op vd, vs2, vs1


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D88142

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoV.td


Index: llvm/lib/Target/RISCV/RISCVInstrInfoV.td
===================================================================
--- llvm/lib/Target/RISCV/RISCVInstrInfoV.td
+++ llvm/lib/Target/RISCV/RISCVInstrInfoV.td
@@ -216,7 +216,7 @@
                 (ins VRegOp:$vs1, VRegOp:$vs2, VMaskOp:$vm),
                 opcodestr, "$vd, $vs1, $vs2$vm">;
 
-// op vd, vs1, vs2
+// op vd, vs2, vs1
 class VALUVVNoVm<bits<6> funct6, RISCVVFormat opv, string opcodestr>
     : RVInstVV<funct6, opv, (outs VRegOp:$vd),
                (ins VRegOp:$vs2, VRegOp:$vs1),


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