[compiler-rt] 809a42e - [RISCV][ASAN] implementation of ThreadSelf for riscv64

[Vitaly Buka via llvm-commits]

Author: Anatoly Parshintsev
Date: 2020-09-22T23:51:21-07:00
New Revision: 809a42e3d53518b824aad28882f9f9397f25b5b3

URL: https://github.com/llvm/llvm-project/commit/809a42e3d53518b824aad28882f9f9397f25b5b3
DIFF: https://github.com/llvm/llvm-project/commit/809a42e3d53518b824aad28882f9f9397f25b5b3.diff

LOG: [RISCV][ASAN] implementation of ThreadSelf  for riscv64

[6/11] patch series to port ASAN for riscv64

Depends On D87574

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D87575

Added: 
    

Modified: 
    compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp

Removed: 
    


################################################################################
diff  --git a/compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp b/compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
index 4dccc99cd036..fe08ffc1bb4a 100644
--- a/compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
+++ b/compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
@@ -262,8 +262,7 @@ void InitTlsSize() {
 }
 #else
 void InitTlsSize() { }
-#endif  // !SANITIZER_FREEBSD && !SANITIZER_ANDROID && !SANITIZER_GO &&
-// !SANITIZER_NETBSD && !SANITIZER_SOLARIS
+#endif
 
 #if (defined(__x86_64__) || defined(__i386__) || defined(__mips__) ||       \
      defined(__aarch64__) || defined(__powerpc64__) || defined(__s390__) || \
@@ -327,7 +326,7 @@ uptr ThreadSelfOffset() {
   return kThreadSelfOffset;
 }
 
-#if defined(__mips__) || defined(__powerpc64__)
+#if defined(__mips__) || defined(__powerpc64__) || SANITIZER_RISCV64
 // TlsPreTcbSize includes size of struct pthread_descr and size of tcb
 // head structure. It lies before the static tls blocks.
 static uptr TlsPreTcbSize() {
@@ -335,6 +334,8 @@ static uptr TlsPreTcbSize() {
   const uptr kTcbHead = 16; // sizeof (tcbhead_t)
 #elif defined(__powerpc64__)
   const uptr kTcbHead = 88; // sizeof (tcbhead_t)
+#elif SANITIZER_RISCV64
+  const uptr kTcbHead = 16;  // sizeof (tcbhead_t)
 #endif
   const uptr kTlsAlign = 16;
   const uptr kTlsPreTcbSize =
@@ -364,6 +365,13 @@ uptr ThreadSelf() {
 #elif defined(__aarch64__) || defined(__arm__)
   descr_addr = reinterpret_cast<uptr>(__builtin_thread_pointer()) -
                                       ThreadDescriptorSize();
+#elif SANITIZER_RISCV64
+  uptr tcb_end;
+  asm volatile("mv %0, tp;\n" : "=r"(tcb_end));
+  // https://github.com/riscv/riscv-elf-psabi-doc/issues/53
+  const uptr kTlsTcbOffset = 0x800;
+  descr_addr =
+      reinterpret_cast<uptr>(tcb_end - kTlsTcbOffset - TlsPreTcbSize());
 #elif defined(__s390__)
   descr_addr = reinterpret_cast<uptr>(__builtin_thread_pointer());
 #elif defined(__powerpc64__)