[PATCH] D88085: AArch64: avoid error when truncating MCExprs

Florian Hahn via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 22 06:04:57 PDT 2020


fhahn added reviewers: peter.smith, efriedma, MaskRay, david-arm.
fhahn accepted this revision.
fhahn added a comment.
This revision is now accepted and ready to land.

It looks like it is indeed possible to generate fixup values that wrap around in valid LLVM IR and truncating the computed value to the fixup width should match the computation in LLVM IR.

I am not sure there is a more targeted way to detect invalid transforms in the backend that might lead to invalid offsets, but I think for now it would be best to remove the check to make sure we can handle valid IR.

LGTM, but please wait a day or so in case there is additional feedback.


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