[llvm] 94c799f - [ARM] Trying to fix asan buildbot

[Sam Parker via llvm-commits]

Author: Sam Parker
Date: 2020-09-22T13:43:23+01:00
New Revision: 94c799fecff06c614cb68976288fc7b8c9a11139

URL: https://github.com/llvm/llvm-project/commit/94c799fecff06c614cb68976288fc7b8c9a11139
DIFF: https://github.com/llvm/llvm-project/commit/94c799fecff06c614cb68976288fc7b8c9a11139.diff

LOG: [ARM] Trying to fix asan buildbot

Added: 
    

Modified: 
    llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp b/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
index 4452a6c1f1d1..578ba30db8f6 100644
--- a/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
+++ b/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
@@ -973,12 +973,13 @@ bool LowOverheadLoop::ValidateMVEInst(MachineInstr* MI) {
   // alter the predicate upon themselves.
   const MCInstrDesc &MCID = MI->getDesc();
   bool IsUse = false;
-  for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
-    const MachineOperand &MO = MI->getOperand(i);
+  unsigned LastOpIdx = MI->getNumOperands() - 1;
+  for (auto &Op : enumerate(reverse(MCID.operands()))) {
+    const MachineOperand &MO = MI->getOperand(LastOpIdx - Op.index());
     if (!MO.isReg() || !MO.isUse() || MO.getReg() != ARM::VPR)
       continue;
 
-    if (ARM::isVpred(MCID.OpInfo[i].OperandType)) {
+    if (ARM::isVpred(Op.value().OperandType)) {
       VPTState::addInst(MI);
       IsUse = true;
     } else if (MI->getOpcode() != ARM::MVE_VPST) {