[llvm] 825203d - [AArch64][GlobalISel] Make <4 x s16> G_ASHR and G_LSHR legal.

[Amara Emerson via llvm-commits]

Author: Amara Emerson
Date: 2020-09-21T15:32:48-07:00
New Revision: 825203daae7ffea0326757fdbb819682dfbef4f9

URL: https://github.com/llvm/llvm-project/commit/825203daae7ffea0326757fdbb819682dfbef4f9
DIFF: https://github.com/llvm/llvm-project/commit/825203daae7ffea0326757fdbb819682dfbef4f9.diff

LOG: [AArch64][GlobalISel] Make <4 x s16> G_ASHR and G_LSHR legal.

Selection support for these is coming up.

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index bbdd2381ccdf..43f3c1d31da5 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -144,6 +144,7 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
                  {v4s32, v4s32},
                  {v2s64, v2s64},
                  {v16s8, v16s8},
+                 {v4s16, v4s16},
                  {v8s16, v8s16}})
       .clampScalar(1, s32, s64)
       .clampScalar(0, s32, s64)

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
index ce7c8e7f1b86..e2b9d27051ee 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
@@ -382,3 +382,31 @@ body:             |
     %2:_(<4 x s16>) = G_SHL %0, %1
     $d0 = COPY %2
 ...
+---
+name: test_lshr_v4i16
+body:             |
+  bb.0:
+    ; CHECK-LABEL: name: test_lshr_v4i16
+    ; CHECK: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
+    ; CHECK: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $d1
+    ; CHECK: [[LSHR:%[0-9]+]]:_(<4 x s16>) = G_LSHR [[COPY]], [[COPY1]](<4 x s16>)
+    ; CHECK: $d0 = COPY [[LSHR]](<4 x s16>)
+    %0:_(<4 x s16>) = COPY $d0
+    %1:_(<4 x s16>) = COPY $d1
+    %2:_(<4 x s16>) = G_LSHR %0, %1
+    $d0 = COPY %2
+...
+---
+name: test_ashr_v4i16
+body:             |
+  bb.0:
+    ; CHECK-LABEL: name: test_ashr_v4i16
+    ; CHECK: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
+    ; CHECK: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $d1
+    ; CHECK: [[ASHR:%[0-9]+]]:_(<4 x s16>) = G_ASHR [[COPY]], [[COPY1]](<4 x s16>)
+    ; CHECK: $d0 = COPY [[ASHR]](<4 x s16>)
+    %0:_(<4 x s16>) = COPY $d0
+    %1:_(<4 x s16>) = COPY $d1
+    %2:_(<4 x s16>) = G_ASHR %0, %1
+    $d0 = COPY %2
+...