[PATCH] D88028: [AMDGPU] More codegen patterns for v2i16/v2f16 build_vector

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

All of this constant folding is really a DAG workaround



================
Comment at: llvm/lib/Target/AMDGPU/SIInstructions.td:2051
+  (v2i16 (build_vector (i16 SReg_32:$src1), (i16 0))),
+  (S_AND_B32 (i32 0xffff), SReg_32:$src1)
+>;
----------------
This needs a move to materialize the constant?


================
Comment at: llvm/lib/Target/AMDGPU/SIInstructions.td:2056
+  (v2f16 (build_vector (f16 SReg_32:$src1), (f16 FP_ZERO))),
+  (S_AND_B32 (i32 0xffff), SReg_32:$src1)
+>;
----------------
Ditto


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  https://reviews.llvm.org/D88028/new/

https://reviews.llvm.org/D88028