[PATCH] D87936: [GISel] Add new combines for G_ADD

Michael Kitzan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 18 17:50:45 PDT 2020


mkitzan added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll:54-62
+; GFX9-NEXT:    s_lshl_b32 s1, s0, 1
+; GFX9-NEXT:    s_set_gpr_idx_on s1, gpr_idx(SRC0)
 ; GFX9-NEXT:    s_waitcnt vmcnt(0)
 ; GFX9-NEXT:    v_mov_b32_e32 v0, v2
 ; GFX9-NEXT:    v_mov_b32_e32 v1, v3
+; GFX9-NEXT:    s_set_gpr_idx_off
+; GFX9-NEXT:    s_or_b32 s0, s0, 1
----------------
arsenm wrote:
> mkitzan wrote:
> > arsenm wrote:
> > > This is a much more interesting regression
> > I noticed regressions in this test file too. The combine causing them is the: `G_ADD(x, y)` -> `G_OR(x, y)` (iff x and y share no common bits). That combine rule is the cause of nearly all the AMDGPU test changes (with the exception of three or four tests).
> So we need the equivalent utility for SelectionDAG::isBaseWithConstantOffset(
Not quite sure where that fits into the implementation of the combine. The added `GlobalISel/Utils.cpp:haveNoCommonBitsSet` acts the same as `SelectionDAG.pp:haveNoCommonBitsSet` which is used to gate the DAG combine version `(x + y)` -> `(x | y)` iff `x` and `y` share no bits.


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  https://reviews.llvm.org/D87936/new/

https://reviews.llvm.org/D87936



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