[PATCH] D87188: [InstCombine] Canonicalize SPF to abs intrinc

Martin Storsjö via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 17 23:51:27 PDT 2020


mstorsjo added a comment.

This broke a few tests for me (generating code that now gives the fail result at runtime).

I'm not entirely sure which bit is the culprit, but the difference in output (that breaks tests) for one object file is available at https://martin.st/temp/vc1_block-diff-aarch64.txt, and https://martin.st/temp/vc1_block-diff-armv7.txt. For the aarch64 version, it looks like some conditionals are inverted, like these changes:

  -	b.ge	.LBB1_124
  +	b.hs	.LBB1_124

and

  -	csel	w14, w15, w14, gt
  +	csel	w14, w15, w14, hi

(with no seemingly related changes that would change the roles of the registers).

The input files for reproducing the issues are available at https://martin.st/temp/vc1_block-aarch64.c and https://martin.st/temp/vc1_block-armv7.c, which can be compiled with `clang -target {aarch64,armv7}-w64-mingw32 -c -O2 vc1_block-{aarch64,armv7}.c`.


Repository:
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  https://reviews.llvm.org/D87188/new/

https://reviews.llvm.org/D87188



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