[PATCH] D87882: [AMDGPU] Fix merging m0 inits
Piotr Sobczak via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 17 22:13:17 PDT 2020
piotr created this revision.
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Fix incorrect merges of m0 inits in loops.
It was assumed that if a clobbering instruction appears in
the same block as an init and the clobbering instruction
does not dominate the init then it does not interfere with
init.
This does not work in the presence of loops, where in this
scenario, the clobbering instruction does interfere with
the init in another iteration.
To fix this, do not check for block equality and defer the
decision to the predecessor check.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D87882
Files:
llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
llvm/test/CodeGen/AMDGPU/merge-m0.mir
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