[PATCH] D87384: [PowerPC] Add ISEL patterns for Mul with Imm.

[Jinsong Ji via Phabricator via llvm-commits]

jsji added a comment.

Why this can NOT be done in DAGCombiner by implementing `decomposeMulByConstant` target hook?



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Comment at: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:4988
+    int64_t ImmSh = Imm >> Shift;
+    if (isInt<16>(ImmSh)) {
+      uint64_t SextImm = SignExtend64(ImmSh & 0xFFFF, 16);
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Can we add comments about all these scenarios?  With simple examples.


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Comment at: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:4998
+    if (isPowerOf2_64(ImmSh - 1)) {
+      // The multiplicand has exactly two bits set so we don't need a multiply.
+      unsigned Shift2 = countTrailingZeros<uint64_t>(ImmSh - 1);
----------------
`exactly two bits set `? What do you mean?


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https://reviews.llvm.org/D87384