[PATCH] D85364: [SVE][WIP] Implement lowering for fixed width select

Cameron McInally via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 17 09:02:09 PDT 2020


cameron.mcinally updated this revision to Diff 292526.
cameron.mcinally added a comment.

Here's the most obvious choice -- glueing the new check to the AArch64ISD::EXT generation. That's good because the intention is obvious, and future code changes won't get in the way. But it could also be argued that the NEON-sized vector check should precede this entire if-else statement. I.e. the EXTRACT_SUBVECTORs have the same problem as AArch64ISD::EXT. None of this code is ready for SVE-sized fixed vectors.

Thoughts on this? I don't have a strong opinion.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D85364/new/

https://reviews.llvm.org/D85364

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/test/CodeGen/AArch64/sve-fixed-length-fp-select.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-int-select.ll

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