[PATCH] D86878: [AMDGPU] Fix a miscompile with S_ADD/S_SUB
Piotr Sobczak via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 17 07:46:18 PDT 2020
piotr added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp:1056
+ unsigned CondOpc = CI->getOpcode();
+ if (CondOpc == ISD::AND || CondOpc == ISD::OR || CondOpc == ISD::XOR) {
+ auto ST = static_cast<const GCNSubtarget *>(Subtarget);
----------------
arsenm wrote:
> I don't think it will end up mattering with the operations legal for i1 (although maybe trunc is also a problem), but I think it would be somewhat safer to list valid boolean sources instead
Will do, but what do you mean exactly by "valid boolean sources" here?
================
Comment at: llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll:16
+
+define void @combine_add_zext_xor() {
+.entry:
----------------
arsenm wrote:
> Should be able to reduce this more
This already comes from bugpoint, but I will try to reduce the test a bit more.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D86878/new/
https://reviews.llvm.org/D86878
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