[PATCH] D87821: [AMDGPU] Set DS alignment requirements to be more strict

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

>From the description, I don't understand what this is trying to fix



================
Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:1438-1439
+        !Subtarget->hasLDSMisalignedBug()) {
       if (IsFast)
         *IsFast = true;
       return true;
----------------
I think the logic for 2 byte alignment not being fast also applies here, but that's a separate change


================
Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:1467-1468
       // ds_read2/write2_b64.
-      bool Aligned = Alignment >= Align((Subtarget->hasUnalignedDSAccess() &&
-                                         !Subtarget->hasLDSMisalignedBug())
-                                            ? 4
----------------
This looks wrong to me, 4 byte alignment is still usable?


================
Comment at: llvm/test/CodeGen/AMDGPU/ds_write2.ll:2
 ; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs -mattr=+load-store-opt < %s | FileCheck -enable-var-scope -strict-whitespace -check-prefixes=GCN,CI %s
-; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -mattr=+load-store-opt,+flat-for-global,-unaligned-access-mode < %s | FileCheck -enable-var-scope -strict-whitespace -check-prefixes=GCN,GFX9,GFX9-ALIGNED %s
+; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -mattr=+load-store-opt,+flat-for-global,-unaligned-access-mode,-dword-access-mode < %s | FileCheck -enable-var-scope -strict-whitespace -check-prefixes=GCN,GFX9,GFX9-ALIGNED %s
+; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs -mattr=+load-store-opt,+flat-for-global,+dword-access-mode < %s | FileCheck -enable-var-scope -strict-whitespace -check-prefixes=GCN,GFX9,GFX9-DWORDALIGNED %s
----------------
What is -dword-access-mode?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D87821/new/

https://reviews.llvm.org/D87821