[PATCH] D66688: [LoopVectorize] Leverage speculation safety to avoid masked.loads
Fangrui Song via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 15 11:42:35 PDT 2020
MaskRay added inline comments.
================
Comment at: llvm/trunk/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp:977
+static bool mustSuppressSpeculation(const LoadInst &LI) {
+ if (!LI.isUnordered())
+ return true;
----------------
reames wrote:
> MaskRay wrote:
> > Is this isUnordered or isSimple?
> >
> > IIUC isSimple is a subset of isUnordered.
> Well, it's written as intended, but that might not be what you're trying to ask? Do you have an example you're wondering about?
In D87538, `VectorCombine::vectorizeLoadInsert` uses the utility to suppress some cases. It uses `Load->isSimple()` but I don't know whether it should be isUnordered or mustSuppressSpeculation should use isSimple. Appreciate if you can take a look at that piece of code (you can ignore the most complexity there. The main thing is that it is a load widening)
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D66688/new/
https://reviews.llvm.org/D66688
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