[PATCH] D87707: [AArch64][SVE] Add lowering for llvm fsqrt

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm accepted this revision.
paulwalker-arm added a comment.
This revision is now accepted and ready to land.

In D87707#2274650 <https://reviews.llvm.org/D87707#2274650>, @Asif wrote:

> @paulwalker-arm: I couldn't find out the corresponding ISD Node for FRECPX.

There isn't likely to be a common ISD node that matches FRECPX.  Normally this would mean it's not yet worth creating a predicated variant but this time I think there's benefit to creating FRECPX_MERGE_PASSTHRU because it'll remove the final user for sve_fp_2op_p_zd_HSD's int_op operand.  You shouldn't need any extra testing for FRECPX_MERGE_PASSTHRU because there's no IR route to create the node outside of intrinsics, which is already tested.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87707/new/

https://reviews.llvm.org/D87707