[PATCH] D87679: [LV] Unroll factor is expected to be > 0

[Evgeniy via Phabricator via llvm-commits]

ebrevnov updated this revision to Diff 291882.
ebrevnov added a comment.

Minor change to test case


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87679/new/

https://reviews.llvm.org/D87679

Files:
  llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
  llvm/test/Transforms/LoopVectorize/SystemZ/zero_unroll.ll


Index: llvm/test/Transforms/LoopVectorize/SystemZ/zero_unroll.ll
===================================================================
--- /dev/null
+++ llvm/test/Transforms/LoopVectorize/SystemZ/zero_unroll.ll
@@ -0,0 +1,22 @@
+; RUN: opt -S -loop-vectorize -mtriple=s390x-linux-gnu -tiny-trip-count-interleave-threshold=4 -vectorizer-min-trip-count=8 < %s | FileCheck %s
+; RUN: opt -S -passes=loop-vectorize -mtriple=s390x-linux-gnu -tiny-trip-count-interleave-threshold=4 -vectorizer-min-trip-count=8 < %s | FileCheck %s
+
+define i32 @main(i32 %arg, i8** nocapture readnone %arg1) #0 {
+;CHECK: vector.body:
+entry:
+  %0 = alloca i8, align 1
+  br label %loop
+
+loop:
+  %storemerge.i.i = phi i8 [ 0, %entry ], [ %tmp12.i.i, %loop ]
+  store i8 %storemerge.i.i, i8* %0, align 2
+  %tmp8.i.i = icmp ult i8 %storemerge.i.i, 8
+  %tmp12.i.i = add nuw nsw i8 %storemerge.i.i, 1
+  br i1 %tmp8.i.i, label %loop, label %ret
+
+ret:
+  ret i32 0
+}
+
+attributes #0 = { "target-cpu"="z13" }
+
Index: llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
===================================================================
--- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -5616,7 +5616,8 @@
   // that the target and trip count allows.
   if (IC > MaxInterleaveCount)
     IC = MaxInterleaveCount;
-  else if (IC < 1)
+
+  if (IC < 1)
     IC = 1;
 
   // Interleave if we vectorized this loop and there is a reduction that could


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