[PATCH] D87654: [AArch64][GlobalISel] Partially port tryShiftAmountMod from AArch64ISelDAGToDAG

[Jessica Paquette via Phabricator via llvm-commits]

paquette created this revision.
paquette added a reviewer: aemerson.
Herald added subscribers: danielkiss, hiraditya, kristof.beyls, rovka.
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This ports the AND case from AArch64DAGToDAGISel::tryShiftAmountMod.

This allows us to fold a G_AND into a G_LSHR/G_ASHR/G_SHL. This is possible when the G_AND is against a constant with all ones in the low bits checked by a variable shift instruction.


https://reviews.llvm.org/D87654

Files:
  llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/opt-shift-amount-mod.mir

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