[llvm] 46f9137 - [GISel]: Add combine for G_FABS to G_FABS
Aditya Nandakumar via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 14 15:56:38 PDT 2020
Author: Aditya Nandakumar
Date: 2020-09-14T15:56:24-07:00
New Revision: 46f9137e43f3eb2de9990765a4c482b45b0f8dd5
URL: https://github.com/llvm/llvm-project/commit/46f9137e43f3eb2de9990765a4c482b45b0f8dd5
DIFF: https://github.com/llvm/llvm-project/commit/46f9137e43f3eb2de9990765a4c482b45b0f8dd5.diff
LOG: [GISel]: Add combine for G_FABS to G_FABS
https://reviews.llvm.org/D87554
Patch adds one new GICombinerRule for G_FABS. The combine rule folds G_FABS(G_FABS(X)) to G_FABS(X).
Patch additionally adds new combiner tests for the AArch64 target to test this new combiner rule.
Patch by mkitzan.
Added:
llvm/test/CodeGen/AArch64/GlobalISel/combine-fabs.mir
Modified:
llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
llvm/include/llvm/Target/GlobalISel/Combine.td
llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h b/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
index 44aa7a96aa73..8a5e80386e7e 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
@@ -280,6 +280,10 @@ class CombinerHelper {
/// Transform fneg(fneg(x)) to x.
bool matchCombineFNegOfFNeg(MachineInstr &MI, Register &Reg);
+ /// Match fabs(fabs(x)) to fabs(x).
+ bool matchCombineFAbsOfFAbs(MachineInstr &MI, Register &Src);
+ bool applyCombineFAbsOfFAbs(MachineInstr &MI, Register &Src);
+
/// Return true if any explicit use operand on \p MI is defined by a
/// G_IMPLICIT_DEF.
bool matchAnyExplicitUseIsUndef(MachineInstr &MI);
diff --git a/llvm/include/llvm/Target/GlobalISel/Combine.td b/llvm/include/llvm/Target/GlobalISel/Combine.td
index e8a92012782c..f99252935db4 100644
--- a/llvm/include/llvm/Target/GlobalISel/Combine.td
+++ b/llvm/include/llvm/Target/GlobalISel/Combine.td
@@ -403,6 +403,15 @@ def unmerge_merge : GICombineRule<
(apply [{ return Helper.applyCombineUnmergeMergeToPlainValues(*${d}, ${info}); }])
>;
+// Fold (fabs (fabs x)) -> (fabs x).
+def fabs_fabs_fold_matchinfo : GIDefMatchData<"Register">;
+def fabs_fabs_fold: GICombineRule<
+ (defs root:$root, fabs_fabs_fold_matchinfo:$matchinfo),
+ (match (wip_match_opcode G_FABS):$root,
+ [{ return Helper.matchCombineFAbsOfFAbs(*${root}, ${matchinfo}); }]),
+ (apply [{ return Helper.applyCombineFAbsOfFAbs(*${root}, ${matchinfo}); }])
+>;
+
// FIXME: These should use the custom predicate feature once it lands.
def undef_combines : GICombineGroup<[undef_to_fp_zero, undef_to_int_zero,
undef_to_negative_one,
@@ -433,4 +442,5 @@ def all_combines : GICombineGroup<[trivial_combines, ptr_add_immed_chain,
shl_ashr_to_sext_inreg, sext_inreg_of_load,
width_reduction_combines, select_combines,
known_bits_simplifications, ext_ext_fold,
- not_cmp_fold, opt_brcond_by_inverting_cond, unmerge_merge]>;
+ not_cmp_fold, opt_brcond_by_inverting_cond,
+ unmerge_merge, fabs_fabs_fold]>;
diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
index 1ec2a3f1e26f..a2a7d6b928d4 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -1878,6 +1878,21 @@ bool CombinerHelper::matchCombineFNegOfFNeg(MachineInstr &MI, Register &Reg) {
return mi_match(SrcReg, MRI, m_GFNeg(m_Reg(Reg)));
}
+bool CombinerHelper::matchCombineFAbsOfFAbs(MachineInstr &MI, Register &Src) {
+ assert(MI.getOpcode() == TargetOpcode::G_FABS && "Expected a G_FABS");
+ Src = MI.getOperand(1).getReg();
+ Register AbsSrc;
+ return mi_match(Src, MRI, m_GFabs(m_Reg(AbsSrc)));
+}
+
+bool CombinerHelper::applyCombineFAbsOfFAbs(MachineInstr &MI, Register &Src) {
+ assert(MI.getOpcode() == TargetOpcode::G_FABS && "Expected a G_FABS");
+ Register Dst = MI.getOperand(0).getReg();
+ MI.eraseFromParent();
+ replaceRegWith(MRI, Dst, Src);
+ return true;
+}
+
bool CombinerHelper::matchAnyExplicitUseIsUndef(MachineInstr &MI) {
return any_of(MI.explicit_uses(), [this](const MachineOperand &MO) {
return MO.isReg() &&
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/combine-fabs.mir b/llvm/test/CodeGen/AArch64/GlobalISel/combine-fabs.mir
new file mode 100644
index 000000000000..32aa60fe6045
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/combine-fabs.mir
@@ -0,0 +1,32 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs -mtriple aarch64-unknown-unknown %s -o - | FileCheck %s
+# RUN: llc -debugify-and-strip-all-safe -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs -mtriple aarch64-unknown-unknown %s -o - | FileCheck %s
+
+---
+name: test_combine_fabs_fabs
+body: |
+ bb.1:
+ liveins: $w0
+ ; CHECK-LABEL: name: test_combine_fabs_fabs
+ ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
+ ; CHECK: [[FABS:%[0-9]+]]:_(s32) = G_FABS [[COPY]]
+ ; CHECK: $w0 = COPY [[FABS]](s32)
+ %0:_(s32) = COPY $w0
+ %1:_(s32) = G_FABS %0(s32)
+ %2:_(s32) = G_FABS %1(s32)
+ $w0 = COPY %2(s32)
+...
+---
+name: test_combine_fabs_fabs_vec
+body: |
+ bb.1:
+ liveins: $x0
+ ; CHECK-LABEL: name: test_combine_fabs_fabs_vec
+ ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $x0
+ ; CHECK: [[FABS:%[0-9]+]]:_(<2 x s32>) = G_FABS [[COPY]]
+ ; CHECK: $x0 = COPY [[FABS]](<2 x s32>)
+ %0:_(<2 x s32>) = COPY $x0
+ %1:_(<2 x s32>) = G_FABS %0(<2 x s32>)
+ %2:_(<2 x s32>) = G_FABS %1(<2 x s32>)
+ $x0 = COPY %2(<2 x s32>)
+...
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