[PATCH] D87634: [AVR] Improve AVR disassembly

[Alex Mikhalev via Phabricator via llvm-commits]

amikhalev created this revision.
amikhalev added a reviewer: dylanmckay.
Herald added subscribers: llvm-commits, Jim, hiraditya, mgorny.
Herald added a project: LLVM.
amikhalev requested review of this revision.

- Add decoder for relative branch target operands.
- Add decoder for memri (reg + imm) operands.
- Change the way FSTLD instruction format is handled to be more compatible with disassembly. Instead of setting the inconsistent bit in a post encoder method, have it be part of the ptrreg operand so the LDSTDPtrReg encoder/decoder can handle it.
- Implement MCInstrAnalysis for AVR so `llvm-objdump` can show (some) branch targets.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D87634

Files:
  llvm/lib/Target/AVR/AVRInstrFormats.td
  llvm/lib/Target/AVR/AVRInstrInfo.td
  llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
  llvm/lib/Target/AVR/MCTargetDesc/AVRInstrAnalysis.cpp
  llvm/lib/Target/AVR/MCTargetDesc/AVRInstrAnalysis.h
  llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.cpp
  llvm/lib/Target/AVR/MCTargetDesc/AVRMCCodeEmitter.h
  llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.cpp
  llvm/lib/Target/AVR/MCTargetDesc/CMakeLists.txt

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