[PATCH] D87618: [AMDGPU] should expand ROTL i16 to shifts.

Alexander via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 14 09:55:48 PDT 2020


alex-t created this revision.
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Instruction combining pass turns library rotl implementation to llvm.fshl.i16.
In the selection dag the intrinsic is turned to ISD::ROTL node that cannot be selected.
Need to expand it to shifts again.


https://reviews.llvm.org/D87618

Files:
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp


Index: llvm/lib/Target/AMDGPU/SIISelLowering.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -546,7 +546,7 @@
     AddPromotedToType(ISD::SIGN_EXTEND, MVT::i16, MVT::i32);
 
     setOperationAction(ISD::ROTR, MVT::i16, Promote);
-    setOperationAction(ISD::ROTL, MVT::i16, Promote);
+    setOperationAction(ISD::ROTL, MVT::i16, Expand);
 
     setOperationAction(ISD::SDIV, MVT::i16, Promote);
     setOperationAction(ISD::UDIV, MVT::i16, Promote);


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