[PATCH] D87538: [VectorCombine] Don't vectorize scalar load under asan/hwasan/memtag/tsan
Fangrui Song via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 11 16:33:48 PDT 2020
MaskRay marked 2 inline comments as done.
MaskRay added inline comments.
================
Comment at: llvm/lib/Transforms/Vectorize/VectorCombine.cpp:147
// use an identity shuffle to shrink/grow the vector.
if (Ty != MinVecTy) {
unsigned OutputNumElts = Ty->getNumElements();
----------------
vitalybuka wrote:
> Shouldn't we disable only this case?
>
This branch performs (1) load widening followed by (2) widening/narrowing the result with shufflevector. Due to the first step (load widening), the whole optimization (D86160) is unsafe.
Added a specific test for it.
================
Comment at: llvm/lib/Transforms/Vectorize/VectorCombine.cpp:693
+ // concurrently modified.
+ bool CanWiden = !F.hasFnAttribute(Attribute::SanitizeAddress) &&
+ !F.hasFnAttribute(Attribute::SanitizeThread);
----------------
vitalybuka wrote:
> It should apply to SanitizeHWAddress and SanitizeMemTag as well
>
>
Thanks! (I know little about hwasan/memtag. I will learn about them)
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D87538/new/
https://reviews.llvm.org/D87538
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