[PATCH] D87490: [MachineInstr] return mayAlias for not mayLoadOrStore instructions.
ChenZheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 10 21:41:58 PDT 2020
shchenz updated this revision to Diff 291125.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D87490/new/
https://reviews.llvm.org/D87490
Files:
llvm/lib/CodeGen/MachineInstr.cpp
Index: llvm/lib/CodeGen/MachineInstr.cpp
===================================================================
--- llvm/lib/CodeGen/MachineInstr.cpp
+++ llvm/lib/CodeGen/MachineInstr.cpp
@@ -1234,14 +1234,14 @@
const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
const MachineFrameInfo &MFI = MF->getFrameInfo();
- // If neither instruction stores to memory, they can't alias in any
- // meaningful way, even if they read from the same address.
- if (!mayStore() && !Other.mayStore())
+ // If both instructions are loads, they can't alias in any meaningful way,
+ // even if they read from the same address.
+ if (mayLoad() && !mayStore() && Other.mayLoad() && !Other.mayStore())
return false;
// Both instructions must be memory operations to be able to alias.
if (!mayLoadOrStore() || !Other.mayLoadOrStore())
- return false;
+ return true;
// Let the target decide if memory accesses cannot possibly overlap.
if (TII->areMemAccessesTriviallyDisjoint(*this, Other))
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