[llvm] a5168bd - [DemandedBits][BDCE] Add support for min/max intrinsics

Nikita Popov via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 10 13:13:59 PDT 2020


Author: Nikita Popov
Date: 2020-09-10T22:13:31+02:00
New Revision: a5168bdb4a25485ac62e18bdc538b4842bc9fbd9

URL: https://github.com/llvm/llvm-project/commit/a5168bdb4a25485ac62e18bdc538b4842bc9fbd9
DIFF: https://github.com/llvm/llvm-project/commit/a5168bdb4a25485ac62e18bdc538b4842bc9fbd9.diff

LOG: [DemandedBits][BDCE] Add support for min/max intrinsics

Add DemandedBits / BDCE support for min/max intrinsics: If the low
bits are not demanded in the result, they also aren't demanded in
the operands.

Differential Revision: https://reviews.llvm.org/D87161

Added: 
    

Modified: 
    llvm/lib/Analysis/DemandedBits.cpp
    llvm/test/Transforms/BDCE/intrinsics.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Analysis/DemandedBits.cpp b/llvm/lib/Analysis/DemandedBits.cpp
index 1575d1555072..461fd7239905 100644
--- a/llvm/lib/Analysis/DemandedBits.cpp
+++ b/llvm/lib/Analysis/DemandedBits.cpp
@@ -170,6 +170,14 @@ void DemandedBits::determineLiveOperandBits(
         }
         break;
       }
+      case Intrinsic::umax:
+      case Intrinsic::umin:
+      case Intrinsic::smax:
+      case Intrinsic::smin:
+        // If low bits of result are not demanded, they are also not demanded
+        // for the min/max operands.
+        AB = APInt::getBitsSetFrom(BitWidth, AOut.countTrailingZeros());
+        break;
       }
     }
     break;

diff  --git a/llvm/test/Transforms/BDCE/intrinsics.ll b/llvm/test/Transforms/BDCE/intrinsics.ll
index 5a186f01fd29..ea0a2289feb2 100644
--- a/llvm/test/Transforms/BDCE/intrinsics.ll
+++ b/llvm/test/Transforms/BDCE/intrinsics.ll
@@ -8,8 +8,8 @@ declare i8 @llvm.smin.i8(i8, i8)
 
 define i8 @umax(i8 %x, i8 %y, i1 %a, i1 %b) {
 ; CHECK-LABEL: @umax(
-; CHECK-NEXT:    [[A2:%.*]] = zext i1 [[A:%.*]] to i8
-; CHECK-NEXT:    [[B2:%.*]] = zext i1 [[B:%.*]] to i8
+; CHECK-NEXT:    [[A2:%.*]] = zext i1 false to i8
+; CHECK-NEXT:    [[B2:%.*]] = zext i1 false to i8
 ; CHECK-NEXT:    [[X2:%.*]] = or i8 [[X:%.*]], [[A2]]
 ; CHECK-NEXT:    [[Y2:%.*]] = or i8 [[Y:%.*]], [[B2]]
 ; CHECK-NEXT:    [[M:%.*]] = call i8 @llvm.umax.i8(i8 [[X2]], i8 [[Y2]])
@@ -27,8 +27,8 @@ define i8 @umax(i8 %x, i8 %y, i1 %a, i1 %b) {
 
 define i8 @umin(i8 %x, i8 %y, i1 %a, i1 %b) {
 ; CHECK-LABEL: @umin(
-; CHECK-NEXT:    [[A2:%.*]] = zext i1 [[A:%.*]] to i8
-; CHECK-NEXT:    [[B2:%.*]] = zext i1 [[B:%.*]] to i8
+; CHECK-NEXT:    [[A2:%.*]] = zext i1 false to i8
+; CHECK-NEXT:    [[B2:%.*]] = zext i1 false to i8
 ; CHECK-NEXT:    [[X2:%.*]] = or i8 [[X:%.*]], [[A2]]
 ; CHECK-NEXT:    [[Y2:%.*]] = or i8 [[Y:%.*]], [[B2]]
 ; CHECK-NEXT:    [[M:%.*]] = call i8 @llvm.umin.i8(i8 [[X2]], i8 [[Y2]])
@@ -46,8 +46,8 @@ define i8 @umin(i8 %x, i8 %y, i1 %a, i1 %b) {
 
 define i8 @smax(i8 %x, i8 %y, i1 %a, i1 %b) {
 ; CHECK-LABEL: @smax(
-; CHECK-NEXT:    [[A2:%.*]] = zext i1 [[A:%.*]] to i8
-; CHECK-NEXT:    [[B2:%.*]] = zext i1 [[B:%.*]] to i8
+; CHECK-NEXT:    [[A2:%.*]] = zext i1 false to i8
+; CHECK-NEXT:    [[B2:%.*]] = zext i1 false to i8
 ; CHECK-NEXT:    [[X2:%.*]] = or i8 [[X:%.*]], [[A2]]
 ; CHECK-NEXT:    [[Y2:%.*]] = or i8 [[Y:%.*]], [[B2]]
 ; CHECK-NEXT:    [[M:%.*]] = call i8 @llvm.smax.i8(i8 [[X2]], i8 [[Y2]])
@@ -65,8 +65,8 @@ define i8 @smax(i8 %x, i8 %y, i1 %a, i1 %b) {
 
 define i8 @smin(i8 %x, i8 %y, i1 %a, i1 %b) {
 ; CHECK-LABEL: @smin(
-; CHECK-NEXT:    [[A2:%.*]] = zext i1 [[A:%.*]] to i8
-; CHECK-NEXT:    [[B2:%.*]] = zext i1 [[B:%.*]] to i8
+; CHECK-NEXT:    [[A2:%.*]] = zext i1 false to i8
+; CHECK-NEXT:    [[B2:%.*]] = zext i1 false to i8
 ; CHECK-NEXT:    [[X2:%.*]] = or i8 [[X:%.*]], [[A2]]
 ; CHECK-NEXT:    [[Y2:%.*]] = or i8 [[Y:%.*]], [[B2]]
 ; CHECK-NEXT:    [[M:%.*]] = call i8 @llvm.smin.i8(i8 [[X2]], i8 [[Y2]])


        


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