[llvm] e15215e - AMDGPU: Hoist check for VGPRs

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2020-09-09T19:45:40-04:00
New Revision: e15215e04154e1bc8ea57d46f36b054adf49a3ed

URL: https://github.com/llvm/llvm-project/commit/e15215e04154e1bc8ea57d46f36b054adf49a3ed
DIFF: https://github.com/llvm/llvm-project/commit/e15215e04154e1bc8ea57d46f36b054adf49a3ed.diff

LOG: AMDGPU: Hoist check for VGPRs

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
index 5abe39241c70..ae1f6e212d98 100644
--- a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
@@ -1026,8 +1026,10 @@ bool SIInsertWaitcnts::generateWaitcntInstBefore(
           continue;
         RegInterval Interval =
             ScoreBrackets.getRegInterval(&MI, TII, MRI, TRI, I);
+
+        const bool IsVGPR = TRI->isVGPR(*MRI, Op.getReg());
         for (int RegNo = Interval.first; RegNo < Interval.second; ++RegNo) {
-          if (TRI->isVGPR(*MRI, Op.getReg())) {
+          if (IsVGPR) {
             // RAW always needs an s_waitcnt. WAW needs an s_waitcnt unless the
             // previous write and this write are the same type of VMEM
             // instruction, in which case they're guaranteed to write their