[llvm] 91656fc - [X86] Add tests for minnum/maxnum with constant NaN (NFC)

[Nikita Popov via llvm-commits]

Author: Nikita Popov
Date: 2020-09-09T22:36:51+02:00
New Revision: 91656fcb57ec6878833aba615e1142225514e13b

URL: https://github.com/llvm/llvm-project/commit/91656fcb57ec6878833aba615e1142225514e13b
DIFF: https://github.com/llvm/llvm-project/commit/91656fcb57ec6878833aba615e1142225514e13b.diff

LOG: [X86] Add tests for minnum/maxnum with constant NaN (NFC)

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/fmaxnum.ll
    llvm/test/CodeGen/X86/fminnum.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/fmaxnum.ll b/llvm/test/CodeGen/X86/fmaxnum.ll
index 2a7bb25164d3..41256ba18dd6 100644
--- a/llvm/test/CodeGen/X86/fmaxnum.ll
+++ b/llvm/test/CodeGen/X86/fmaxnum.ll
@@ -609,5 +609,39 @@ define float @test_maxnum_const_op2(float %x) {
   ret float %r
 }
 
+define float @test_maxnum_const_nan(float %x) {
+; SSE-LABEL: test_maxnum_const_nan:
+; SSE:       # %bb.0:
+; SSE-NEXT:    movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
+; SSE-NEXT:    movaps %xmm0, %xmm1
+; SSE-NEXT:    cmpunordss %xmm0, %xmm1
+; SSE-NEXT:    movaps %xmm1, %xmm3
+; SSE-NEXT:    andps %xmm2, %xmm3
+; SSE-NEXT:    maxss %xmm0, %xmm2
+; SSE-NEXT:    andnps %xmm2, %xmm1
+; SSE-NEXT:    orps %xmm3, %xmm1
+; SSE-NEXT:    movaps %xmm1, %xmm0
+; SSE-NEXT:    retq
+;
+; AVX1-LABEL: test_maxnum_const_nan:
+; AVX1:       # %bb.0:
+; AVX1-NEXT:    vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; AVX1-NEXT:    vmaxss %xmm0, %xmm1, %xmm2
+; AVX1-NEXT:    vcmpunordss %xmm0, %xmm0, %xmm0
+; AVX1-NEXT:    vblendvps %xmm0, %xmm1, %xmm2, %xmm0
+; AVX1-NEXT:    retq
+;
+; AVX512-LABEL: test_maxnum_const_nan:
+; AVX512:       # %bb.0:
+; AVX512-NEXT:    vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
+; AVX512-NEXT:    vmaxss %xmm0, %xmm2, %xmm1
+; AVX512-NEXT:    vcmpunordss %xmm0, %xmm0, %k1
+; AVX512-NEXT:    vmovss %xmm2, %xmm1, %xmm1 {%k1}
+; AVX512-NEXT:    vmovaps %xmm1, %xmm0
+; AVX512-NEXT:    retq
+  %r = call float @llvm.maxnum.f32(float %x, float 0x7fff000000000000)
+  ret float %r
+}
+
 attributes #0 = { "no-nans-fp-math"="true" }
 

diff  --git a/llvm/test/CodeGen/X86/fminnum.ll b/llvm/test/CodeGen/X86/fminnum.ll
index fc4c48686a95..373920c185e3 100644
--- a/llvm/test/CodeGen/X86/fminnum.ll
+++ b/llvm/test/CodeGen/X86/fminnum.ll
@@ -609,5 +609,39 @@ define float @test_minnum_const_op2(float %x) {
   ret float %r
 }
 
+define float @test_minnum_const_nan(float %x) {
+; SSE-LABEL: test_minnum_const_nan:
+; SSE:       # %bb.0:
+; SSE-NEXT:    movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
+; SSE-NEXT:    movaps %xmm0, %xmm1
+; SSE-NEXT:    cmpunordss %xmm0, %xmm1
+; SSE-NEXT:    movaps %xmm1, %xmm3
+; SSE-NEXT:    andps %xmm2, %xmm3
+; SSE-NEXT:    minss %xmm0, %xmm2
+; SSE-NEXT:    andnps %xmm2, %xmm1
+; SSE-NEXT:    orps %xmm3, %xmm1
+; SSE-NEXT:    movaps %xmm1, %xmm0
+; SSE-NEXT:    retq
+;
+; AVX1-LABEL: test_minnum_const_nan:
+; AVX1:       # %bb.0:
+; AVX1-NEXT:    vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; AVX1-NEXT:    vminss %xmm0, %xmm1, %xmm2
+; AVX1-NEXT:    vcmpunordss %xmm0, %xmm0, %xmm0
+; AVX1-NEXT:    vblendvps %xmm0, %xmm1, %xmm2, %xmm0
+; AVX1-NEXT:    retq
+;
+; AVX512-LABEL: test_minnum_const_nan:
+; AVX512:       # %bb.0:
+; AVX512-NEXT:    vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
+; AVX512-NEXT:    vminss %xmm0, %xmm2, %xmm1
+; AVX512-NEXT:    vcmpunordss %xmm0, %xmm0, %k1
+; AVX512-NEXT:    vmovss %xmm2, %xmm1, %xmm1 {%k1}
+; AVX512-NEXT:    vmovaps %xmm1, %xmm0
+; AVX512-NEXT:    retq
+  %r = call float @llvm.minnum.f32(float %x, float 0x7fff000000000000)
+  ret float %r
+}
+
 attributes #0 = { "no-nans-fp-math"="true" }