[PATCH] D87391: [Intrinsics] define semantics for experimental fmax/fmin vector reductions

[Sanjay Patel via Phabricator via llvm-commits]

spatel updated this revision to Diff 290813.
spatel added a comment.

Patch updated:

1. Removed FMF conditions for AArch64/ARM expansion of reductions in IR (no test diffs from that IIUC).
2. Clear 'nnan' when legalizing vector types by using NaN elements.
3. Added x86 tests for odd vector types (several of these would crash without this patch because there is no default or x86 lowering for ISD::FMAXIMUM / ISD::FMINIMUM).


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87391/new/

https://reviews.llvm.org/D87391

Files:
  llvm/docs/LangRef.rst
  llvm/include/llvm/CodeGen/BasicTTIImpl.h
  llvm/lib/CodeGen/ExpandReductions.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
  llvm/lib/Target/ARM/ARMTargetTransformInfo.h
  llvm/test/CodeGen/AArch64/vecreduce-fmax-legalization-nan.ll
  llvm/test/CodeGen/AArch64/vecreduce-fmax-legalization.ll
  llvm/test/CodeGen/Generic/expand-experimental-reductions.ll
  llvm/test/CodeGen/Thumb2/mve-vecreduce-fminmax.ll
  llvm/test/CodeGen/Thumb2/mve-vecreduce-loops.ll
  llvm/test/CodeGen/X86/vector-reduce-fmax-nnan.ll
  llvm/test/CodeGen/X86/vector-reduce-fmax.ll
  llvm/test/CodeGen/X86/vector-reduce-fmin-nnan.ll
  llvm/test/CodeGen/X86/vector-reduce-fmin.ll

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