[PATCH] D87037: [DAGCombiner] Propagate FMF flags in FMA folding

Sanjay Patel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 8 06:01:11 PDT 2020


spatel accepted this revision.
spatel added a comment.
This revision is now accepted and ready to land.

LGTM - This patch shows a minimal improvement, and I don't think it does any harm. 
We should, however, follow-up with the clean-up of redundant/dead code and enhancement for vector support.



================
Comment at: llvm/test/CodeGen/PowerPC/fma-combine.ll:293
+; CHECK-FAST-NEXT:    xxswapd 0, 0
+; CHECK-FAST-NEXT:    xvmaddadp 34, 34, 0
+; CHECK-FAST-NEXT:    blr
----------------
qiucf wrote:
> spatel wrote:
> > I can't tell if anything is changing on this test with this patch. Should this not reduce to 'xor' like the scalar code?
> For the `NOVSX` check: `v2f64` isn't legal, so result before this patch is `fsub+fsub`. Now it returns constants.
> 
> If VSX is enabled, combiner will not meet the condition, since `ConstantFPSDNode` not works for vectors. So result doesn't change.
Ah, ok. Please put a 'TODO' comment in the code and here in the test so we can remember that.


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