[PATCH] D87279: [CFE] Fix handling of physical registers in inline assembly operands.

[Jonas Paulsson via Phabricator via llvm-commits]

jonpa created this revision.
jonpa added reviewers: uweigand, craig.topper, ahatanak.
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jonpa requested review of this revision.

Improve EmitAsmStmt() to

- Not tie physregs with the "+r" constraint, but instead add the hard register as an input constraint. This makes "+r" and "=r":"r" look the same in the output.

Background: Macro intensive code may contain inline assembly statements with multiple operands constrained to the same physreg. Such a case with the operand constraints "+r" : "r" currently triggers the TwoAddressInstructionPass assertion against any extra use of a tied register. Furthermore, TwoAddress will insert a COPY to that physreg even though isel has already done so (for the non-tied use), which may lead to a second redundant instruction currently.

A simple fix for this is to not emit tied physreg uses in the first place for the "+r" constraint, which is what this patch does.

- Give an error on multiple outputs to the same physical register.

This should be reported and this is also what GCC does.


https://reviews.llvm.org/D87279

Files:
  clang/lib/CodeGen/CGStmt.cpp
  clang/test/CodeGen/systemz-inline-asm-02.c
  clang/test/CodeGen/systemz-inline-asm.c

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