[llvm] ea79530 - [PowerPC] Add parentheses to silence gcc warning

[Mikael Holmen via llvm-commits]

Author: Mikael Holmen
Date: 2020-09-08T08:39:57+02:00
New Revision: ea795304ec073a63c3c5b4fd0c5579e667201dad

URL: https://github.com/llvm/llvm-project/commit/ea795304ec073a63c3c5b4fd0c5579e667201dad
DIFF: https://github.com/llvm/llvm-project/commit/ea795304ec073a63c3c5b4fd0c5579e667201dad.diff

LOG: [PowerPC] Add parentheses to silence gcc warning

Without gcc 7.4 warns with

../lib/Target/PowerPC/PPCInstrInfo.cpp:2284:25: warning: suggest parentheses around '&&' within '||' [-Wparentheses]
          BaseOp1.isFI() &&
          ~~~~~~~~~~~~~~~^~
              "Only base registers and frame indices are supported.");
              ~

Added: 
    

Modified: 
    llvm/lib/Target/PowerPC/PPCInstrInfo.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index 2c4549899e0c..9afc0308533e 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -2280,9 +2280,8 @@ bool PPCInstrInfo::shouldClusterMemOps(
   assert(BaseOps1.size() == 1 && BaseOps2.size() == 1);
   const MachineOperand &BaseOp1 = *BaseOps1.front();
   const MachineOperand &BaseOp2 = *BaseOps2.front();
-  assert(BaseOp1.isReg() ||
-         BaseOp1.isFI() &&
-             "Only base registers and frame indices are supported.");
+  assert((BaseOp1.isReg() || BaseOp1.isFI()) &&
+         "Only base registers and frame indices are supported.");
 
   // The NumLoads means the number of loads that has been clustered.
   // Don't cluster memory op if there are already two ops clustered at least.