[PATCH] D87145: [SelectionDAG] Remove an early-out from computeKnownBits for smin/smax

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a reviewer: craig.topper.
RKSimon added a subscriber: craig.topper.
RKSimon added inline comments.


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Comment at: llvm/test/CodeGen/X86/avx512-trunc.ll:1020
 ; SKX-NEXT:    vzeroupper
 ; SKX-NEXT:    retq
   %x1 = icmp sgt <16 x i16> %i, <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>
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Is this testing what it means to? I can't remember offhand what the test is for - @craig.topper any ideas?


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Comment at: llvm/test/CodeGen/X86/masked_store_trunc_usat.ll:5199
+; SSE2-NEXT:    pminsw %xmm9, %xmm0
+; SSE2-NEXT:    pand %xmm8, %xmm0
 ; SSE2-NEXT:    packuswb %xmm1, %xmm0
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regression?


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Comment at: llvm/test/CodeGen/X86/masked_store_trunc_usat.ll:6420
 ; SSE2-NEXT:    pminsw %xmm5, %xmm0
-; SSE2-NEXT:    pxor %xmm4, %xmm0
+; SSE2-NEXT:    pand %xmm6, %xmm0
 ; SSE2-NEXT:    packuswb %xmm1, %xmm0
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regression?


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Comment at: llvm/test/CodeGen/X86/vector-trunc-usat.ll:4266
 ; SSE2-NEXT:    pminsw {{.*}}(%rip), %xmm0
-; SSE2-NEXT:    pxor %xmm1, %xmm0
+; SSE2-NEXT:    pand {{.*}}(%rip), %xmm0
 ; SSE2-NEXT:    packuswb %xmm0, %xmm0
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we appear to have 3 constant loads now instead of 2


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  https://reviews.llvm.org/D87145/new/

https://reviews.llvm.org/D87145