[PATCH] D87149: [InstCombine] erase instructions leading up to unreachable

[Sanjay Patel via Phabricator via llvm-commits]

spatel updated this revision to Diff 290279.
spatel marked 3 inline comments as done.
spatel added a comment.

Patch updated:

1. Removed unused check.
2. Updated test option to "-instcombine-infinite-loop-threshold=2".


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87149/new/

https://reviews.llvm.org/D87149

Files:
  llvm/lib/Transforms/InstCombine/InstCombineInternal.h
  llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
  llvm/test/Transforms/InstCombine/assume.ll
  llvm/test/Transforms/InstCombine/pr33689_same_bitwidth.ll


Index: llvm/test/Transforms/InstCombine/pr33689_same_bitwidth.ll
===================================================================
--- llvm/test/Transforms/InstCombine/pr33689_same_bitwidth.ll
+++ llvm/test/Transforms/InstCombine/pr33689_same_bitwidth.ll
@@ -17,8 +17,6 @@
 ; CHECK-NEXT:    [[T12_SUB:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[T12]], i16 0, i16 0
 ; CHECK-NEXT:    br i1 [[COND:%.*]], label [[BB1:%.*]], label [[BB2:%.*]]
 ; CHECK:       bb1:
-; CHECK-NEXT:    [[T8:%.*]] = ptrtoint [2 x i32]* [[T12]] to i16
-; CHECK-NEXT:    store i16 [[T8]], i16* @a, align 2
 ; CHECK-NEXT:    unreachable
 ; CHECK:       bb2:
 ; CHECK-NEXT:    [[T9:%.*]] = load i16*, i16** @b, align 2
Index: llvm/test/Transforms/InstCombine/assume.ll
===================================================================
--- llvm/test/Transforms/InstCombine/assume.ll
+++ llvm/test/Transforms/InstCombine/assume.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -instcombine -S | FileCheck %s
+; RUN: opt < %s -instcombine -S -instcombine-infinite-loop-threshold=2 | FileCheck %s
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
@@ -543,7 +543,6 @@
 
 define void @PR36270(i32 %b) {
 ; CHECK-LABEL: @PR36270(
-; CHECK-NEXT:    tail call void @llvm.assume(i1 false)
 ; CHECK-NEXT:    unreachable
 ;
   %B7 = xor i32 -1, 2147483647
@@ -573,8 +572,6 @@
 ; CHECK-NEXT:    tail call void @llvm.assume(i1 [[CMP3]])
 ; CHECK-NEXT:    br label [[EXIT]]
 ; CHECK:       exit:
-; CHECK-NEXT:    [[CMP4:%.*]] = icmp eq i32 [[X]], 2
-; CHECK-NEXT:    tail call void @llvm.assume(i1 [[CMP4]])
 ; CHECK-NEXT:    unreachable
 ;
 entry:
@@ -612,11 +609,6 @@
 ; CHECK-NEXT:    tail call void @llvm.assume(i1 [[CMP3]])
 ; CHECK-NEXT:    br label [[EXIT]]
 ; CHECK:       exit:
-; CHECK-NEXT:    [[CMP4:%.*]] = icmp eq i32 [[X]], 2
-; CHECK-NEXT:    tail call void @llvm.assume(i1 [[CMP4]])
-; CHECK-NEXT:    [[CMP5:%.*]] = icmp ugt i32 [[Y]], 42
-; CHECK-NEXT:    tail call void @llvm.assume(i1 [[CMP5]])
-; CHECK-NEXT:    store i32 [[X]], i32* [[P:%.*]], align 4
 ; CHECK-NEXT:    unreachable
 ;
 entry:
Index: llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
===================================================================
--- llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+++ llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
@@ -2798,6 +2798,19 @@
   return nullptr;
 }
 
+Instruction *InstCombinerImpl::visitUnreachableInst(UnreachableInst &I) {
+  // Try to remove the previous instruction if it must lead to unreachable.
+  // This includes instructions like stores and "llvm.assume" that may not get
+  // removed by simple dead code elimination.
+  Instruction *Prev = I.getPrevNonDebugInstruction();
+  if (Prev && !Prev->isEHPad() &&
+      isGuaranteedToTransferExecutionToSuccessor(Prev)) {
+    eraseInstFromFunction(*Prev);
+    return &I;
+  }
+  return nullptr;
+}
+
 Instruction *InstCombinerImpl::visitUnconditionalBranchInst(BranchInst &BI) {
   assert(BI.isUnconditional() && "Only for unconditional branches.");
 
Index: llvm/lib/Transforms/InstCombine/InstCombineInternal.h
===================================================================
--- llvm/lib/Transforms/InstCombine/InstCombineInternal.h
+++ llvm/lib/Transforms/InstCombine/InstCombineInternal.h
@@ -159,6 +159,7 @@
   Instruction *visitFenceInst(FenceInst &FI);
   Instruction *visitSwitchInst(SwitchInst &SI);
   Instruction *visitReturnInst(ReturnInst &RI);
+  Instruction *visitUnreachableInst(UnreachableInst &I);
   Instruction *
   foldAggregateConstructionIntoAggregateReuse(InsertValueInst &OrigIVI);
   Instruction *visitInsertValueInst(InsertValueInst &IV);


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D87149.290279.patch
Type: text/x-patch
Size: 3786 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200907/445b2a93/attachment.bin>