[llvm] 7ba0f81 - [X86] Unbreak the build after 22fa6b20d92e
Benjamin Kramer via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 7 03:25:05 PDT 2020
Author: Benjamin Kramer
Date: 2020-09-07T12:24:30+02:00
New Revision: 7ba0f81934ca5f4baa1d81ac0032f2e4ff6614ec
URL: https://github.com/llvm/llvm-project/commit/7ba0f81934ca5f4baa1d81ac0032f2e4ff6614ec
DIFF: https://github.com/llvm/llvm-project/commit/7ba0f81934ca5f4baa1d81ac0032f2e4ff6614ec.diff
LOG: [X86] Unbreak the build after 22fa6b20d92e
Added:
Modified:
llvm/lib/Target/X86/X86FrameLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp
index d7a377e0c6ba..7437c2e978af 100644
--- a/llvm/lib/Target/X86/X86FrameLowering.cpp
+++ b/llvm/lib/Target/X86/X86FrameLowering.cpp
@@ -491,8 +491,8 @@ void X86FrameLowering::emitCalleeSavedFrameMoves(
const MachineModuleInfo &MMI = MF.getMMI();
const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
const Register FramePtr = TRI->getFrameRegister(MF);
- const unsigned MachineFramePtr =
- STI.isTarget64BitILP32() ? unsigned(getX86SubSuperRegister(FramePtr, 64))
+ const Register MachineFramePtr =
+ STI.isTarget64BitILP32() ? Register(getX86SubSuperRegister(FramePtr, 64))
: FramePtr;
unsigned DwarfReg = MRI->getDwarfRegNum(MachineFramePtr, true);
// Offset = space for return address + size of the frame pointer itself.
More information about the llvm-commits
mailing list