[PATCH] D87215: [SelectionDAG][X86][ARM] Teach ExpandIntRes_ABS to use sra+add+xor expansion when ADDCARRY is supported.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: spatel, RKSimon, efriedma.
Herald added subscribers: danielkiss, ecnelises, dmgreen, hiraditya, kristof.beyls.
Herald added a project: LLVM.
craig.topper requested review of this revision.

Rather than using SELECT instructions, use SRA, UADDO/ADDCARRY and
XORs to expand ABS. This is the multi-part version of the sequence
we use in LegalizeDAG.

It's also the same as the Custom sequence uses for i64 on 32-bit
and i128 on 64-bit. So we can remove the X86 customization.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D87215

Files:
  llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/test/CodeGen/Thumb2/mve-abs.ll
  llvm/test/CodeGen/X86/abs.ll
  llvm/test/CodeGen/X86/iabs.ll

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