[PATCH] D87160: [SCEV] Recognize min/max intrinsics

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added a comment.

Two afterthoughts:

1. I suspect that until SCEV actually produces these intrinsics, this is `undef`-unsafe. Thought i suspect there are other similar problems, so i'm not sure if we should worry about it just yet.
2. Should also handle `abs`:

  ----------------------------------------
  define i32 @src(i32 %x, i1 %y) {
  %0:
    %r = abs i32 %x, %y
    ret i32 %r
  }
  =>
  define i32 @tgt(i32 %x, i1 %y) {
  %0:
    %x_frozen = freeze i32 %x
    %t0 = sub i32 0, %x_frozen
    %r = smax i32 %x_frozen, %t0
    ret i32 %r
  }
  Transformation seems to be correct!

  ----------------------------------------
  define i32 @src(i32 %x) {
  %0:
    %r = abs i32 %x, 1
    ret i32 %r
  }
  =>
  define i32 @tgt(i32 %x) {
  %0:
    %x_frozen = freeze i32 %x
    %t0 = sub nsw i32 0, %x_frozen
    %r = smax i32 %x_frozen, %t0
    ret i32 %r
  }
  Transformation seems to be correct!


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D87160/new/

https://reviews.llvm.org/D87160