[PATCH] D84737: [AArch64][SVE] Preserve full vector regs over EH edge.

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen added a comment.

Thanks for reviewing the patch!

In D84737#2250735 <https://reviews.llvm.org/D84737#2250735>, @efriedma wrote:

> I'm not completely confident this is the best approach; it might come out cleaner if the clobber is attached to a MachineInstr.

What MachineInstr would it need to be attached to? When adding the clobbers to the invoke instruction that penalises the normal return. When adding the clobbers to e.g. the EH_LABEL instruction in the unwind-block, the register spills are added at the start of the unwinding block rather than before the call instruction.

> As it is, it's depending on sort of fragile invariants to ensure the value isn't live across the unwind edge: every register allocator has to be aware of getCustomEHPadPreservedMask, and any post-regalloc optimizations that the unwind edge is special.

The clobber mask is applied when calculating the live intervals which is used as input to the register allocator, so I would think that register allocators themselves don't need to be aware of this as well. I.e. Once this information is reflected in the live ranges, there isn't anything that the register allocator should do to change that.


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