[PATCH] D86995: [VectorCombine][SVE] Do not fold bitcast shuffle for scalable type.
Huihui Zhang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 2 11:08:44 PDT 2020
huihuiz updated this revision to Diff 289518.
huihuiz marked 2 inline comments as done.
huihuiz added a comment.
Thanks Sanjay for the review!
Addressed review comments.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D86995/new/
https://reviews.llvm.org/D86995
Files:
llvm/lib/Transforms/Vectorize/VectorCombine.cpp
llvm/test/Transforms/VectorCombine/AArch64/lit.local.cfg
llvm/test/Transforms/VectorCombine/AArch64/vscale-bitcast-shuffle.ll
Index: llvm/test/Transforms/VectorCombine/AArch64/vscale-bitcast-shuffle.ll
===================================================================
--- /dev/null
+++ llvm/test/Transforms/VectorCombine/AArch64/vscale-bitcast-shuffle.ll
@@ -0,0 +1,21 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -vector-combine -S -mtriple=aarch64-- | FileCheck %s --check-prefixes=CHECK
+
+target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
+target triple = "aarch64-unknown-linux-gnu"
+
+; This test checks we are not crashing with TTI when trying to get shuffle cost.
+; This test also check that shuffle mask <vscale x 4 x i32> zeroinitializer is
+; not narrowed into <0, 1, 0, 1, ...>, which we cannot reason if it's a valid
+; splat or not.
+
+define <vscale x 8 x i16> @bitcast_shuffle(<vscale x 4 x i32> %a) {
+; CHECK-LABEL: @bitcast_shuffle(
+; CHECK-NEXT: [[I:%.*]] = shufflevector <vscale x 4 x i32> [[A:%.*]], <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
+; CHECK-NEXT: [[R:%.*]] = bitcast <vscale x 4 x i32> [[I]] to <vscale x 8 x i16>
+; CHECK-NEXT: ret <vscale x 8 x i16> [[R]]
+;
+ %i = shufflevector <vscale x 4 x i32> %a, <vscale x 4 x i32> undef, <vscale x 4 x i32> zeroinitializer
+ %r = bitcast <vscale x 4 x i32> %i to <vscale x 8 x i16>
+ ret <vscale x 8 x i16> %r
+}
Index: llvm/test/Transforms/VectorCombine/AArch64/lit.local.cfg
===================================================================
--- /dev/null
+++ llvm/test/Transforms/VectorCombine/AArch64/lit.local.cfg
@@ -0,0 +1,2 @@
+if not 'AArch64' in config.root.targets:
+ config.unsupported = True
Index: llvm/lib/Transforms/Vectorize/VectorCombine.cpp
===================================================================
--- llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+++ llvm/lib/Transforms/Vectorize/VectorCombine.cpp
@@ -424,11 +424,14 @@
m_OneUse(m_Shuffle(m_Value(V), m_Undef(), m_Mask(Mask))))))
return false;
- // Disallow non-vector casts and length-changing shuffles.
+ // 1) Do not fold bitcast shuffle for scalable type. First, shuffle cost for
+ // scalable type is unknown; Second, we cannot reason if the narrowed shuffle
+ // mask for scalable type is a splat or not.
+ // 2) Disallow non-vector casts and length-changing shuffles.
// TODO: We could allow any shuffle.
- auto *DestTy = dyn_cast<VectorType>(I.getType());
- auto *SrcTy = cast<VectorType>(V->getType());
- if (!DestTy || I.getOperand(0)->getType() != SrcTy)
+ auto *DestTy = dyn_cast<FixedVectorType>(I.getType());
+ auto *SrcTy = dyn_cast<FixedVectorType>(V->getType());
+ if (!SrcTy || !DestTy || I.getOperand(0)->getType() != SrcTy)
return false;
// The new shuffle must not cost more than the old shuffle. The bitcast is
@@ -437,10 +440,8 @@
TTI.getShuffleCost(TargetTransformInfo::SK_PermuteSingleSrc, SrcTy))
return false;
- // FIXME: it should be possible to implement the computation of the widened
- // shuffle mask in terms of ElementCount to work with scalable shuffles.
- unsigned DestNumElts = cast<FixedVectorType>(DestTy)->getNumElements();
- unsigned SrcNumElts = cast<FixedVectorType>(SrcTy)->getNumElements();
+ unsigned DestNumElts = DestTy->getNumElements();
+ unsigned SrcNumElts = SrcTy->getNumElements();
SmallVector<int, 16> NewMask;
if (SrcNumElts <= DestNumElts) {
// The bitcast is from wide to narrow/equal elements. The shuffle mask can
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