[llvm] 6f7737c - [ImplicitNullChecks] NFC: Separated out checks and added comments

[Anna Thomas via llvm-commits]

Author: Anna Thomas
Date: 2020-09-02T10:29:44-04:00
New Revision: 6f7737c46811993c0ed9b9143cbe4cb49dcf1d03

URL: https://github.com/llvm/llvm-project/commit/6f7737c46811993c0ed9b9143cbe4cb49dcf1d03
DIFF: https://github.com/llvm/llvm-project/commit/6f7737c46811993c0ed9b9143cbe4cb49dcf1d03.diff

LOG: [ImplicitNullChecks] NFC: Separated out checks and added comments

Separated out some checks in isSuitableMemoryOp and added comments
explaining why some of those checks are done.

Tests-Run:X86 implicit null checks tests.

Added: 
    

Modified: 
    llvm/lib/CodeGen/ImplicitNullChecks.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/ImplicitNullChecks.cpp b/llvm/lib/CodeGen/ImplicitNullChecks.cpp
index 16c9bfc672af..c6b1eeb3408c 100644
--- a/llvm/lib/CodeGen/ImplicitNullChecks.cpp
+++ b/llvm/lib/CodeGen/ImplicitNullChecks.cpp
@@ -368,18 +368,26 @@ ImplicitNullChecks::isSuitableMemoryOp(const MachineInstr &MI,
   const MachineOperand *BaseOp;
 
 
-  if (!TII->getMemOperandWithOffset(MI, BaseOp, Offset, OffsetIsScalable, TRI) ||
-      !BaseOp->isReg() || BaseOp->getReg() != PointerReg)
+  // FIXME: This handles only simple addressing mode.
+  if (!TII->getMemOperandWithOffset(MI, BaseOp, Offset, OffsetIsScalable, TRI))
+   return SR_Unsuitable;
+
+  // We need the base of the memory instruction to be same as the register
+  // where the null check is performed (i.e. PointerReg).
+  if (!BaseOp->isReg() || BaseOp->getReg() != PointerReg)
     return SR_Unsuitable;
 
-  // FIXME: This algorithm assumes instructions have fixed-size offsets.
+  // Scalable offsets are a part of scalable vectors (SVE for AArch64). That
+  // target is in-practice unsupported for ImplicitNullChecks.
   if (OffsetIsScalable)
     return SR_Unsuitable;
 
+  if (!MI.mayLoadOrStore() || MI.isPredicable())
+    return SR_Unsuitable;
+
   // We want the mem access to be issued at a sane offset from PointerReg,
   // so that if PointerReg is null then the access reliably page faults.
-  if (!(MI.mayLoadOrStore() && !MI.isPredicable() &&
-        -PageSize < Offset && Offset < PageSize))
+  if (!(-PageSize < Offset && Offset < PageSize))
     return SR_Unsuitable;
 
   // Finally, check whether the current memory access aliases with previous one.