[PATCH] D84737: [AArch64][SVE] Preserve full vector regs over EH edge.

[Eli Friedman via Phabricator via llvm-commits]

efriedma accepted this revision.
efriedma added a comment.
This revision is now accepted and ready to land.

LGTM

I'm not completely confident this is the best approach; it might come out cleaner if the clobber is attached to a MachineInstr.  As it is, it's depending on sort of fragile invariants to ensure the value isn't live across the unwind edge: every register allocator has to be aware of getCustomEHPadPreservedMask, and any post-regalloc optimizations that the unwind edge is special.  But I can't come up with any concrete example that would actually cause trouble.


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