[PATCH] D79785: [ARM] Register pressure with -mthumb forces register reload before each call

[Prathamesh via Phabricator via llvm-commits]

prathamesh added a comment.

The MI which hits assertion in MachineVerifier:
tBL 14, $noreg, &g, <regmask $lr $d8 $d9 $d10 $d11 $d12 $d13 $d14 $d15 $q4 $q5 $q6 $q7 $r4 $r5 $r6 $r7 $r8 $r9 $r10 $r11 $s16 $s17 $s18 $s19 $s20 $s21 $s22 $s23 $s24 $s25 $s26 $s27 and 35 more...>, implicit-def $lr, implicit $sp, implicit-def dead $lr, implicit $sp, implicit $r0, implicit $r1, implicit $r2, implicit $r3, implicit-def $sp :: (load 4 from constant-pool)

Since there is a load from constant pool (the function's address), should we mark the instruction with property MayLoad ?

Also, In foldMemoryOperand, would it be better to use:

MachineInstrBuilder MIB =

  BuildMI(*MI.getParent(), InsertPt, MI.getDebugLoc(), get(ARM::tBL))
      .add(predOps(ARMCC::AL))
      .addGlobalAddress(Callee);

instead of:

  const char *FuncName = MF.createExternalSymbolName(Callee->getName());
  MachineInstrBuilder MIB =
      BuildMI(*MI.getParent(), InsertPt, MI.getDebugLoc(), get(ARM::tBL))
          .add(predOps(ARMCC::AL))
          .addExternalSymbol(FuncName);

Thanks!


Repository:
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  https://reviews.llvm.org/D79785/new/

https://reviews.llvm.org/D79785