[PATCH] D84403: [AMDGPU] Use ds_read/write_b96/b128 when possible for SDag

Tue Sep 1 01:50:01 PDT 2020

mbrkusanin added a comment.

In D84403#2248536 <https://reviews.llvm.org/D84403#2248536>, @mareko wrote:

> This breaks LDS. LLVMSetAlignment(inst, 4) on loads and stores has no effect. The IR says "align 4", yet the backend still selects b128.

On what subtargets? GFX9 and 10 should select b128 for align 4. That is the purpose of the patch. Are you saying it selects it for SI, CI or VI?

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https://reviews.llvm.org/D84403