[PATCH] D86862: [NFC] [DAGCombiner] Refactor bitcast folding within fabs/fneg

[Qiu Chaofan via Phabricator via llvm-commits]

qiucf added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:13996
 
   // (fneg (fmul c, x)) -> (fmul -c, x)
   if (N0.getOpcode() == ISD::FMUL &&
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spatel wrote:
> qiucf wrote:
> > By the way, this can be removed since `getNegatedExpression` above already handles it?
> Yes, that seems likely. This code also doesn't handle vectors, so if you can confirm/add tests for those patterns, this should go away.
Yes. https://reviews.llvm.org/rGeb2a405c181c9833eb8676d147619b8c893dc6fa


Repository:
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  https://reviews.llvm.org/D86862/new/

https://reviews.llvm.org/D86862