[PATCH] D86862: [NFC] [DAGCombiner] Refactor bitcast folding within fabs/fneg
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 31 07:11:45 PDT 2020
spatel accepted this revision.
spatel added a comment.
This revision is now accepted and ready to land.
LGTM
================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:13996
// (fneg (fmul c, x)) -> (fmul -c, x)
if (N0.getOpcode() == ISD::FMUL &&
----------------
qiucf wrote:
> By the way, this can be removed since `getNegatedExpression` above already handles it?
Yes, that seems likely. This code also doesn't handle vectors, so if you can confirm/add tests for those patterns, this should go away.
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https://reviews.llvm.org/D86862/new/
https://reviews.llvm.org/D86862
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