[PATCH] D82709: [MachineLICM] [PowerPC] hoisting rematerializable cheap instructions based on register pressure.
ChenZheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 30 19:35:09 PDT 2020
shchenz added a comment.
Herald added a subscriber: danielkiss.
Hi @qcolombet, for the log in https://reviews.llvm.org/P8231, you can just see the RA result at the end. Ideally, we can remat registers %267 ~ %309(2132B - 2216B) to their use, and then we can free some physical registers and assign the physical registers to %166 ~ %190 to save the spills.
I checked the log, when we do spill for %0, LIS instruction, for example %157, is assigned with physical register, but seems RA will only remat instructions when the remat instructions are going to be spilled?
We should add logic inside `selectOrSplitImpl` like: when we try to spill a non-remat instruction, we should check if there is any remat instruction assigned with a physical register. If there is one, we should first remat the remat instruction and assign the physical register to the spilled one? Is this a reasonable change in RA?
Thanks for your comments in advance.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D82709/new/
https://reviews.llvm.org/D82709
More information about the llvm-commits
mailing list