[PATCH] D86578: [TargetLowering] Combine known bits for icmp in SimplifySetCC (PR41182)
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 30 13:51:10 PDT 2020
craig.topper added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:14059
+ // unconditionally take the branch, remove all other successors of CurBB
+ auto SuccMBB = CurMBB->succ_begin();
+ while (SuccMBB != CurMBB->succ_end()) {
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darcangelo.matthew wrote:
> craig.topper wrote:
> > I'm not sure if we can really do this from SelectionDAG. Is there anywhere else that does this in tree?
> > I'm not sure if we can really do this from SelectionDAG. Is there anywhere else that does this in tree?
>
> I found the UnreachableMachineBlockElim pass which may be able to be enhanced for this, but I'm still looking
Sorry, I meant is there anywhere else that does something like this while SelectionDAG exists?
================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:3998
C1 == APInt::getSignedMinValue(OperandBitSize)) {
- SDValue ConstMinusOne =
- DAG.getConstant(APInt::getAllOnesValue(OperandBitSize), dl,
- N1.getValueType());
+ SDValue ConstMinusOne = DAG.getConstant(
+ APInt::getAllOnesValue(OperandBitSize), dl, N1.getValueType());
----------------
Is this just a formatting change?
================
Comment at: llvm/test/CodeGen/X86/test-shrink.ll:574
ret void
no:
ret void
----------------
darcangelo.matthew wrote:
> craig.topper wrote:
> > Can we pre-commit the IR changes here?
> Thank you for taking a look at the changes.
>
> > Can we pre-commit the IR changes here?
>
> Sorry, would you be able to elaborate what you mean here? Do you mean separate these out into another pre-commit review?
I went ahead and modified the tests in trunk. Can you rebase this patch?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D86578/new/
https://reviews.llvm.org/D86578
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