[PATCH] D85225: [Target][AArch64] Allow for char as int8_t in AArch64AsmParser.cpp

[Rainer Orth via Phabricator via llvm-commits]

ro updated this revision to Diff 288621.
ro added a comment.

Non-template version, passing ImmBytes around.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D85225/new/

https://reviews.llvm.org/D85225

Files:
  llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
  llvm/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h


Index: llvm/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h
===================================================================
--- llvm/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h
+++ llvm/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h
@@ -758,41 +758,39 @@
 }
 
 /// Returns true if Imm is valid for CPY/DUP.
-template <typename T>
-static inline bool isSVECpyImm(int64_t Imm) {
+static inline bool isSVECpyImm(int64_t Imm, int ImmBytes) {
   bool IsImm8 = int8_t(Imm) == Imm;
   bool IsImm16 = int16_t(Imm & ~0xff) == Imm;
 
-  if (std::is_same<int8_t, std::make_signed_t<T>>::value)
+  if (ImmBytes == 1)
     return IsImm8 || uint8_t(Imm) == Imm;
 
-  if (std::is_same<int16_t, std::make_signed_t<T>>::value)
+  if (ImmBytes == 2)
     return IsImm8 || IsImm16 || uint16_t(Imm & ~0xff) == Imm;
 
   return IsImm8 || IsImm16;
 }
 
 /// Returns true if Imm is valid for ADD/SUB.
-template <typename T>
-static inline bool isSVEAddSubImm(int64_t Imm) {
-  bool IsInt8t = std::is_same<int8_t, std::make_signed_t<T>>::value;
-  return uint8_t(Imm) == Imm || (!IsInt8t && uint16_t(Imm & ~0xff) == Imm);
+static inline bool isSVEAddSubImm(int64_t Imm, int ImmBytes) {
+  bool IsByte = ImmBytes == 1;
+  return uint8_t(Imm) == Imm || (!IsByte && uint16_t(Imm & ~0xff) == Imm);
 }
 
 /// Return true if Imm is valid for DUPM and has no single CPY/DUP equivalent.
 static inline bool isSVEMoveMaskPreferredLogicalImmediate(int64_t Imm) {
-  if (isSVECpyImm<int64_t>(Imm))
+  if (isSVECpyImm(Imm, 8))
     return false;
 
   auto S = bit_cast<std::array<int32_t, 2>>(Imm);
   auto H = bit_cast<std::array<int16_t, 4>>(Imm);
   auto B = bit_cast<std::array<int8_t, 8>>(Imm);
 
-  if (isSVEMaskOfIdenticalElements<int32_t>(Imm) && isSVECpyImm<int32_t>(S[0]))
+  if (isSVEMaskOfIdenticalElements<int32_t>(Imm) && isSVECpyImm(S[0], 4))
     return false;
-  if (isSVEMaskOfIdenticalElements<int16_t>(Imm) && isSVECpyImm<int16_t>(H[0]))
+  if (isSVEMaskOfIdenticalElements<int16_t>(Imm) && isSVECpyImm(H[0], 2))
     return false;
-  if (isSVEMaskOfIdenticalElements<int8_t>(Imm) && isSVECpyImm<int8_t>(B[0]))
+  if (isSVEMaskOfIdenticalElements<int8_t>(Imm) && isSVECpyImm(B[0], 1))
     return false;
   return isLogicalImmediate(Imm, 64);
 }
Index: llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
===================================================================
--- llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -855,11 +855,12 @@
     if (!isShiftedImm() && (!isImm() || !isa<MCConstantExpr>(getImm())))
       return DiagnosticPredicateTy::NoMatch;
 
-    bool IsByte = std::is_same<int8_t, std::make_signed_t<T>>::value;
+    int ImmBytes = sizeof(T);
+    bool IsByte = ImmBytes == 1;
     if (auto ShiftedImm = getShiftedVal<8>())
       if (!(IsByte && ShiftedImm->second) &&
-          AArch64_AM::isSVECpyImm<T>(uint64_t(ShiftedImm->first)
-                                     << ShiftedImm->second))
+          AArch64_AM::isSVECpyImm(
+              uint64_t(ShiftedImm->first) << ShiftedImm->second, ImmBytes))
         return DiagnosticPredicateTy::Match;
 
     return DiagnosticPredicateTy::NearMatch;
@@ -872,11 +873,12 @@
     if (!isShiftedImm() && (!isImm() || !isa<MCConstantExpr>(getImm())))
       return DiagnosticPredicateTy::NoMatch;
 
-    bool IsByte = std::is_same<int8_t, std::make_signed_t<T>>::value;
+    int ImmBytes = sizeof(T);
+    bool IsByte = ImmBytes == 1;
     if (auto ShiftedImm = getShiftedVal<8>())
       if (!(IsByte && ShiftedImm->second) &&
-          AArch64_AM::isSVEAddSubImm<T>(ShiftedImm->first
-                                        << ShiftedImm->second))
+          AArch64_AM::isSVEAddSubImm(ShiftedImm->first << ShiftedImm->second,
+                                     ImmBytes))
         return DiagnosticPredicateTy::Match;
 
     return DiagnosticPredicateTy::NearMatch;


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