[PATCH] D86709: [GlobalISel] Extend not_cmp_fold to work on conditional expressions
Jessica Paquette via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 27 08:57:56 PDT 2020
paquette added inline comments.
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Comment at: llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp:2154
- // Now try match src to either icmp or fcmp.
- if (!mi_match(XorSrc, MRI, m_GICmp(m_Pred(), m_Reg(), m_Reg()))) {
- // Try fcmp.
- if (!mi_match(XorSrc, MRI, m_GFCmp(m_Pred(), m_Reg(), m_Reg())))
+ // Check that XorSrc is the root of a tree of comparisons combined with ANDs
+ // and ORs. The suffix of RegsToNegate starting from index I is used a work
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A MIR-esque example would be handy here, just to make it explicit what's being matched.
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Comment at: llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp:2155
+ // Check that XorSrc is the root of a tree of comparisons combined with ANDs
+ // and ORs. The suffix of RegsToNegate starting from index I is used a work
+ // list of tree nodes to visit.
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I don't think here's any reason to talk about an index `I` here; from the looks of it, the below loop can be a range-based for?
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Comment at: llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp:2162
return false;
+ MachineInstr *Def = MRI.getVRegDef(Reg);
+ switch (Def->getOpcode()) {
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Usually people assert that the result of `MRI.getVRegDef(...)` isn't null.
I'm not sure if that's actually necessary in this case though; I *think* that it can only be null when you have a physreg, but I'm not entirely sure.
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Comment at: llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp:2193
+ // For each comparison, invert the opcode. For each AND and OR, change the
+ // opcode.
+ switch (Def->getOpcode()) {
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A MIR-esque example would be useful here too?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D86709/new/
https://reviews.llvm.org/D86709
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