[PATCH] D86518: [RISC-V] fmv.s/fmv.d should be as cheap as a move
Alexander Richardson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 27 02:33:18 PDT 2020
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG5ba4d0365b36: [RISC-V] fmv.s/fmv.d should be as cheap as a move (authored by arichardson).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D86518/new/
https://reviews.llvm.org/D86518
Files:
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
Index: llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+++ llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -515,6 +515,11 @@
switch (Opcode) {
default:
break;
+ case RISCV::FSGNJ_D:
+ case RISCV::FSGNJ_S:
+ // The canonical floatig-point move is fsgnj rd, rs, rs.
+ return MI.getOperand(1).isReg() && MI.getOperand(2).isReg() &&
+ MI.getOperand(1).getReg() == MI.getOperand(2).getReg();
case RISCV::ADDI:
case RISCV::ORI:
case RISCV::XORI:
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